Patents by Inventor Imran Mehdi
Imran Mehdi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11824247Abstract: A set of antenna geometries for use in integrated arrays at terahertz frequencies are described. Two fabrication techniques to construct such antennas are presented. The first technique uses an advanced laser micro-fabrication, allowing fabricating advanced 3D geometries. The second technique uses photolithographic processes, allowing the fabrication of arrays on a single wafer in parallel.Type: GrantFiled: May 19, 2020Date of Patent: November 21, 2023Assignee: CALIFORNIA INSTITUTE OF TECHNOLOGYInventors: Goutam Chattopadhyay, Imran Mehdi, Choonsup Lee, John J. Gill, Cecile D. Jung-Kubiak, Nuria Llombart
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Publication number: 20200313271Abstract: A set of antenna geometries for use in integrated arrays at terahertz frequencies are described. Two fabrication techniques to construct such antennas are presented. The first technique uses an advanced laser micro-fabrication, allowing fabricating advanced 3D geometries. The second technique uses photolithographic processes, allowing the fabrication of arrays on a single wafer in parallel.Type: ApplicationFiled: May 19, 2020Publication date: October 1, 2020Applicant: California Institute of TechnologyInventors: Goutam Chattopadhyay, Imran Mehdi, Choonsup Lee, John J. Gill, Cecile D. Jung-Kubiak, Nuria Llombart
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Patent number: 10693210Abstract: A set of antenna geometries for use in integrated arrays at terahertz frequencies are described. Two fabrication techniques to construct such antennas are presented. The first technique uses an advanced laser micro-fabrication, allowing fabricating advanced 3D geometries. The second technique uses photolithographic processes, allowing the fabrication of arrays on a single wafer in parallel.Type: GrantFiled: April 24, 2013Date of Patent: June 23, 2020Assignee: CALIFORNIA INSTITUTE OF TECHNOLOGYInventors: Goutam Chattopadhyay, Imran Mehdi, Choonsup Lee, John J. Gill, Cecile D. Jung-Kubiak, Nuria Llombart
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Patent number: 10100858Abstract: A silicon alignment pin is used to align successive layer of component made in semiconductor chips and/or metallic components to make easier the assembly of devices having a layered structure. The pin is made as a compressible structure which can be squeezed to reduce its outer diameter, have one end fit into a corresponding alignment pocket or cavity defined in a layer of material to be assembled into a layered structure, and then allowed to expand to produce an interference fit with the cavity. The other end can then be inserted into a corresponding cavity defined in a surface of a second layer of material that mates with the first layer. The two layers are in registry when the pin is mated to both. Multiple layers can be assembled to create a multilayer structure. Examples of such devices are presented.Type: GrantFiled: October 28, 2016Date of Patent: October 16, 2018Assignee: CALIFORNIA INSTITUTE OF TECHNOLOGYInventors: Cecile Jung-Kubiak, Theodore Reck, Bertrand Thomas, Robert H. Lin, Alejandro Peralta, John J. Gill, Choonsup Lee, Jose V. Siles, Risaku Toda, Goutam Chattopadhyay, Ken B. Cooper, Imran Mehdi
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Patent number: 10075151Abstract: A solid state device chip including diodes (generating a higher frequency output through frequency multiplication of the input frequency) and a novel on-chip power combining design. Together with the on-chip power combining, the chip has increased efficiency because the diodes' anodes, being micro-fabricated simultaneously on the same patch of a GaAs wafer under identical conditions, are very well balanced. The diodes' GaAs heterostructure and the overall chip geometry are designed to be optimized for high power operation. As a result of all these features, the device can generate record-setting power having a signal frequency in the F-band and W-band (30% conversion efficiency).Type: GrantFiled: November 25, 2015Date of Patent: September 11, 2018Assignee: California Institute of TechnologyInventors: Jose Vicente Siles Perez, Choonsup Lee, Goutam Chattopadhyay, Ken B. Cooper, Imran Mehdi, Robert H. Lin, Alejandro Peralta
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Patent number: 9791321Abstract: A multi-pixel terahertz transceiver is constructed using a stack of semiconductor layers that communicate using vias defined within the semiconductor layers. By using a stack of semiconductor layers, the various electrical functions of each layer can be tested easily without having to assemble the entire transceiver. In addition, the design allows the production of a transceiver having pixels set 10 mm apart.Type: GrantFiled: May 24, 2013Date of Patent: October 17, 2017Assignee: California Institute of TechnologyInventors: Goutam Chattopadhyay, Ken B. Cooper, Emmanuel Decrossas, John J. Gill, Cecile Jung-Kubiak, Choonsup Lee, Robert Lin, Imran Mehdi, Alejandro Peralta, Theodore Reck, Jose Siles
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Publication number: 20170045065Abstract: A silicon alignment pin is used to align successive layer of component made in semiconductor chips and/or metallic components to make easier the assembly of devices having a layered structure. The pin is made as a compressible structure which can be squeezed to reduce its outer diameter, have one end fit into a corresponding alignment pocket or cavity defined in a layer of material to be assembled into a layered structure, and then allowed to expand to produce an interference fit with the cavity. The other end can then be inserted into a corresponding cavity defined in a surface of a second layer of material that mates with the first layer. The two layers are in registry when the pin is mated to both. Multiple layers can be assembled to create a multilayer structure. Examples of such devices are presented.Type: ApplicationFiled: October 28, 2016Publication date: February 16, 2017Inventors: Cecile JUNG-KUBIAK, Theodore RECK, Bertrand THOMAS, Robert H. LIN, Alejandro PERALTA, John J. GILL, Choonsup LEE, Jose V. SILES, Risaku TODA, Goutam CHATTOPADHYAY, Ken B. COOPER, Imran MEHDI
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Patent number: 9512863Abstract: A silicon alignment pin is used to align successive layers of components made in semiconductor chips and/or metallic components to make easier the assembly of devices having a layered structure. The pin is made as a compressible structure which can be squeezed to reduce its outer diameter, have one end fit into a corresponding alignment pocket or cavity defined in a layer of material to be assembled into a layered structure, and then allowed to expand to produce an interference fit with the cavity. The other end can then be inserted into a corresponding cavity defined in a surface of a second layer of material that mates with the first layer. The two layers are in registry when the pin is mated to both. Multiple layers can be assembled to create a multilayer structure. Examples of such devices are presented.Type: GrantFiled: April 26, 2013Date of Patent: December 6, 2016Assignee: CALIFORNIA INSTITUTE OF TECHNOLOGYInventors: Cecile Jung-Kubiak, Theodore Reck, Bertrand Thomas, Robert H. Lin, Alejandro Peralta, John J. Gill, Choonsup Lee, Jose V. Siles, Risaku Toda, Goutam Chattopadhyay, Ken B. Cooper, Imran Mehdi
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Patent number: 9461352Abstract: A multi-step silicon etching process has been developed to fabricate silicon-based terahertz (THz) waveguide components. This technique provides precise dimensional control across multiple etch depths with batch processing capabilities. Nonlinear and passive components such as mixers and multipliers waveguides, hybrids, OMTs and twists have been fabricated and integrated into a small silicon package. This fabrication technique enables a wafer-stacking architecture to provide ultra-compact multi-pixel receiver front-ends in the THz range.Type: GrantFiled: April 15, 2014Date of Patent: October 4, 2016Assignee: California Institute of TechnologyInventors: Cecile Jung-Kubiak, Theodore Reck, Goutam Chattopadhyay, Jose Vicente Siles Perez, Robert H. Lin, Imran Mehdi, Choonsup Lee, Ken B. Cooper, Alejandro Peralta
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Publication number: 20160149562Abstract: A solid state device chip including diodes (generating a higher frequency output through frequency multiplication of the input frequency) and a novel on-chip power combining design. Together with the on-chip power combining, the chip has increased efficiency because the diodes' anodes, being micro-fabricated simultaneously on the same patch of a GaAs wafer under identical conditions, are very well balanced. The diodes' GaAs heterostructure and the overall chip geometry are designed to be optimized for high power operation. As a result of all these features, the device can generate record-setting power having a signal frequency in the F-band and W-band (30% conversion efficiency).Type: ApplicationFiled: November 25, 2015Publication date: May 26, 2016Inventors: Jose Vicente Siles Perez, Choonsup Lee, Goutam Chattopadhyay, Ken B. Cooper, Imran Mehdi, Robert H. Lin, Alejandro Peralta
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Patent number: 9143084Abstract: A novel MMIC on-chip power-combined frequency multiplier device and a method of fabricating the same, comprising two or more multiplying structures integrated on a single chip, wherein each of the integrated multiplying structures are electrically identical and each of the multiplying structures include one input antenna (E-probe) for receiving an input signal in the millimeter-wave, submillimeter-wave or terahertz frequency range inputted on the chip, a stripline based input matching network electrically connecting the input antennas to two or more Schottky diodes in a balanced configuration, two or more Schottky diodes that are used as nonlinear semiconductor devices to generate harmonics out of the input signal and produce the multiplied output signal, stripline based output matching networks for transmitting the output signal from the Schottky diodes to an output antenna, and an output antenna (E-probe) for transmitting the output signal off the chip into the output waveguide transmission line.Type: GrantFiled: August 27, 2012Date of Patent: September 22, 2015Assignee: California Institute of TechnologyInventors: Jose Vicente Siles Perez, Goutam Chattopadhyay, Choonsup Lee, Erich T. Schlecht, Cecile D. Jung-Kubiak, Imran Mehdi
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Publication number: 20140340178Abstract: A multi-step silicon etching process has been developed to fabricate silicon-based terahertz (THz) waveguide components. This technique provides precise dimensional control across multiple etch depths with batch processing capabilities. Nonlinear and passive components such as mixers and multipliers waveguides, hybrids, OMTs and twists have been fabricated and integrated into a small silicon package. This fabrication technique enables a wafer-stacking architecture to provide ultra-compact multi-pixel receiver front-ends in the THz range.Type: ApplicationFiled: April 15, 2014Publication date: November 20, 2014Applicant: CALIFORNIA INSTITUTE OF TECHNOLOGYInventors: Cecile Jung-Kubiak, Theodore Reck, Goutam Chattopadhyay, Jose Vicente Siles Perez, Robert H. Lin, Imran Mehdi, Choonsup Lee, Ken B. Cooper, Alejandro Peralta
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Publication number: 20140147192Abstract: A silicon alignment pin is used to align successive layers of components made in semiconductor chips and/or metallic components to make easier the assembly of devices having a layered structure. The pin is made as a compressible structure which can be squeezed to reduce its outer diameter, have one end fit into a corresponding alignment pocket or cavity defined in a layer of material to be assembled into a layered structure, and then allowed to expand to produce an interference fit with the cavity. The other end can then be inserted into a corresponding cavity defined in a surface of a second layer of material that mates with the first layer. The two layers are in registry when the pin is mated to both. Multiple layers can be assembled to create a multilayer structure. Examples of such devices are presented.Type: ApplicationFiled: April 26, 2013Publication date: May 29, 2014Applicant: CALIFORNIA INSTITUTE OF TECHNOLOGYInventors: Cecile Jung-Kubiak, Theodore Reck, Bertrand Thomas, Robert H. Lin, Alejandro Peralta, John J. Gill, Choonsup Lee, Jose V. Siles, Risaku Toda, Goutam Chattopadhyay, Ken B. Cooper, Imran Mehdi
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Publication number: 20140144009Abstract: A set of antenna geometries for use in integrated arrays at terahertz frequencies are described. Two fabrication techniques to construct such antennas are presented. The first technique uses an advanced laser micro-fabrication, allowing fabricating advanced 3D geometries. The second technique uses photolithographic processes, allowing the fabrication of arrays on a single wafer in parallel.Type: ApplicationFiled: April 24, 2013Publication date: May 29, 2014Applicant: CALIFORNIA INSTITUTE OF TECHNOLOGYInventors: Goutam CHATTOPADHYAY, Imran Mehdi, Choonsup Lee, John J. Gill, Cecile Jung-Kubiak, Nuria Llombart
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Patent number: 8693973Abstract: A coplanar waveguide (CPW) based subharmonic mixer working at 670 GHz using GaAs Schottky diodes. One example of the mixer has a LO input, an RF input and an IF output. Another possible mixer has a LO input, and IF input and an RF output. Each input or output is connected to a coplanar waveguide with a matching network. A pair of antiparallel diodes provides a signal at twice the LO frequency, which is then mixed with a second signal to provide signals having sum and difference frequencies. The output signal of interest is received after passing through a bandpass filter tuned to the frequency range of interest.Type: GrantFiled: May 2, 2012Date of Patent: April 8, 2014Assignee: California Institute of TechnologyInventors: Goutam Chattopadhyay, Erich T. Schlecht, Choonsup Lee, Robert H. Lin, John J. Gill, Seth Sin, Imran Mehdi
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Publication number: 20130229210Abstract: A novel MMIC on-chip power-combined frequency multiplier device and a method of fabricating the same, comprising two or more multiplying structures integrated on a single chip, wherein each of the integrated multiplying structures are electrically identical and each of the multiplying structures include one input antenna (E-probe) for receiving an input signal in the millimeter-wave, submillimeter-wave or terahertz frequency range inputted on the chip, a stripline based input matching network electrically connecting the input antennas to two or more Schottky diodes in a balanced configuration, two or more Schottky diodes that are used as nonlinear semiconductor devices to generate harmonics out of the input signal and produce the multiplied output signal, stripline based output matching networks for transmitting the output signal from the Schottky diodes to an output antenna, and an output antenna (E-probe) for transmitting the output signal off the chip into the output waveguide transmission line.Type: ApplicationFiled: August 27, 2012Publication date: September 5, 2013Applicant: CALIFORNIA INSTITUTE OF TECHNOLOGYInventors: Jose V. Siles, Goutam Chattopadhyay, Choonsup Lee, Erich T. Schlecht, Cecile Jung, Imran Mehdi
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Publication number: 20120280742Abstract: A coplanar waveguide (CPW) based subharmonic mixer working at 670 GHz using GaAs Schottky diodes. One example of the mixer has a LO input, an RF input and an IF output. Another possible mixer has a LO input, and IF input and an RF output. Each input or output is connected to a coplanar waveguide with a matching network. A pair of antiparallel diodes provides a signal at twice the LO frequency, which is then mixed with a second signal to provide signals having sum and difference frequencies. The output signal of interest is received after passing through a bandpass filter tuned to the frequency range of interest.Type: ApplicationFiled: May 2, 2012Publication date: November 8, 2012Applicant: California Institute of TechnologyInventors: Goutam Chattopadhyay, Erich T. Schlecht, Choonsup Lee, Robert H. Lin, John J. Gill, Seth Sin, Imran Mehdi
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Patent number: 8144052Abstract: A three-dimensional imaging radar operating at high frequency e.g., 670 GHz radar using low phase-noise synthesizers and a fast chirper to generate a frequency-modulated continuous-wave (FMCW) waveform, is disclosed that operates with a multiplexed beam to obtain range information simultaneously on multiple pixels of a target. A source transmit beam may be divided by a hybrid coupler into multiple transmit beams multiplexed together and directed to be reflected off a target and return as a single receive beam which is demultiplexed and processed to reveal range information of separate pixels of the target associated with each transmit beam simultaneously. The multiple transmit beams may be developed with appropriate optics to be temporally and spatially differentiated before being directed to the target. Temporal differentiation corresponds to a different intermediate frequencies separating the range information of the multiple pixels.Type: GrantFiled: October 15, 2009Date of Patent: March 27, 2012Assignee: California Institute of TechnologyInventors: Ken B. Cooper, Robert J. Dengler, Peter H. Siegel, Goutam Chattopadhyay, John S. Ward, Nuria Llombart Juan, Tomas E. Bryllert, Imran Mehdi, Jan A. Tarsala
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Patent number: 7773205Abstract: A three-dimensional imaging radar operating at high frequency e.g., 670 GHz, is disclosed. The active target illumination inherent in radar solves the problem of low signal power and narrow-band detection by using submillimeter heterodyne mixer receivers. A submillimeter imaging radar may use low phase-noise synthesizers and a fast chirper to generate a frequency-modulated continuous-wave (FMCW) waveform. Three-dimensional images are generated through range information derived for each pixel scanned over a target. A peak finding algorithm may be used in processing for each pixel to differentiate material layers of the target. Improved focusing is achieved through a compensation signal sampled from a point source calibration target and applied to received signals from active targets prior to FFT-based range compression to extract and display high-resolution target images. Such an imaging radar has particular application in detecting concealed weapons or contraband.Type: GrantFiled: June 6, 2008Date of Patent: August 10, 2010Assignee: California Institute of TechnologyInventors: Ken B. Cooper, Goutam Chattopadhyay, Peter H. Siegel, Robert J. Dengler, Erich T. Schlecht, Imran Mehdi, Anders J. Skalare
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Publication number: 20100090887Abstract: A three-dimensional imaging radar operating at high frequency e.g., 670 GHz radar using low phase-noise synthesizers and a fast chirper to generate a frequency-modulated continuous-wave (FMCW) waveform, is disclosed that operates with a multiplexed beam to obtain range information simultaneously on multiple pixels of a target. A source transmit beam may be divided by a hybrid coupler into multiple transmit beams multiplexed together and directed to be reflected off a target and return as a single receive beam which is demultiplexed and processed to reveal range information of separate pixels of the target associated with each transmit beam simultaneously. The multiple transmit beams may be developed with appropriate optics to be temporally and spatially differentiated before being directed to the target. Temporal differentiation corresponds to a different intermediate frequencies separating the range information of the multiple pixels.Type: ApplicationFiled: October 15, 2009Publication date: April 15, 2010Applicant: California Institute of TechnologyInventors: Ken B. Cooper, Robert J. Dengler, Peter H. Siegel, Goutam Chattopadhyay, John S. Ward, Nuria Llombart Juan, Tomas E. Bryllert, Imran Mehdi, Jan A. Tarsala