Patents by Inventor Imran Qureshi
Imran Qureshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150019259Abstract: The present disclosure describes a system and method for updating and managing clinical care pathways for a healthcare institution. The system can create actions and protocols for care providers using a disease-specific database of recommended interventions. Further, the system can address gaps in care and stratify patient populations to project costs of healthcare services to a healthcare institution.Type: ApplicationFiled: June 24, 2014Publication date: January 15, 2015Inventors: Imran Qureshi, Ronald Razmi, Michael Vidal, Kyle Paul, Elsie Qureshi
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Patent number: 8928377Abstract: A scannable fast dynamic register including a data and scan enable circuit, a precharge circuit, a select circuit, a store circuit, and a scan input enable circuit. The data and scan enable circuit pulls a first precharge node to a discharge node in response to the clock upon evaluation in normal mode. The precharge circuit precharges first and second precharge nodes high, in which one of the precharged nodes discharges depending upon whether a data block evaluates. The store circuit and an output gate are responsive to the second precharge node to provide the output. The select circuit is interposed before the store circuit to allow injection of scan data in a scan mode. In scan mode, the scan input enable circuit provides scan data to the select and store circuits. The scan input enable circuit also includes a store circuit which operates with the first store circuit in a master-slave configuration.Type: GrantFiled: July 25, 2013Date of Patent: January 6, 2015Assignee: VIA Technologies, Inc.Inventor: Imran Qureshi
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Publication number: 20140320188Abstract: A scannable fast dynamic register including a data and scan enable circuit, a precharge circuit, a select circuit, a store circuit, and a scan input enable circuit. The data and scan enable circuit pulls a first precharge node to a discharge node in response to the clock upon evaluation in normal mode. The precharge circuit precharges first and second precharge nodes high, in which one of the precharged nodes discharges depending upon whether a data block evaluates. The store circuit and an output gate are responsive to the second precharge node to provide the output. The select circuit is interposed before the store circuit to allow injection of scan data in a scan mode. In scan mode, the scan input enable circuit provides scan data to the select and store circuits. The scan input enable circuit also includes a store circuit which operates with the first store circuit in a master-slave configuration.Type: ApplicationFiled: July 25, 2013Publication date: October 30, 2014Applicant: VIA TECHNOLOGIES, INC.Inventor: Imran Qureshi
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Publication number: 20140320164Abstract: A fast dynamic register including a data block, a precharge circuit, a transparent latch, and an output logic gate. The precharge circuit precharges first and second precharge nodes and then releases the first precharge node in response to a clock. The data block evaluates data by either pulling the first precharge node low in response to the clock or does not pull it low, in which case the second precharge node is discharged. The transparent latch passes a state of the second precharge node to a store node when transparent, and otherwise latches the store node. The output logic gate drives an output node to a state based on states of the second precharge node and the store node. The transparent latch may be implemented with relatively small devices to reduce size and power consumption to improve efficiency.Type: ApplicationFiled: July 25, 2013Publication date: October 30, 2014Applicant: Via Technologies, Inc.Inventor: Imran Qureshi
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Patent number: 8860463Abstract: A fast dynamic register including a data block, a precharge circuit, a transparent latch, and an output logic gate. The precharge circuit precharges first and second precharge nodes and then releases the first precharge node in response to a clock. The data block evaluates data by either pulling the first precharge node low in response to the clock or does not pull it low, in which case the second precharge node is discharged. The transparent latch passes a state of the second precharge node to a store node when transparent, and otherwise latches the store node. The output logic gate drives an output node to a state based on states of the second precharge node and the store node. The transparent latch may be implemented with relatively small devices to reduce size and power consumption to improve efficiency.Type: GrantFiled: July 25, 2013Date of Patent: October 14, 2014Assignee: VIA Technologies, Inc.Inventor: Imran Qureshi
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Publication number: 20120290954Abstract: Sharing data within an instant messaging session is described. A user participating in an instant messaging session may request a data access key. The key, which provides access to data associated with the user, may then be transmitted via the instant messaging session to one or more other participants in the instant messaging session. The other instant messaging session participants can then use the key to access, via the instant messaging session, the data associated with the user.Type: ApplicationFiled: July 30, 2012Publication date: November 15, 2012Applicant: MICROSOFT CORPORATIONInventors: Imran Qureshi, Evan Gridley
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Patent number: 8271595Abstract: Sharing data within an instant messaging session is described. A user participating in an instant messaging session may request a data access key. The key, which provides access to data associated with the user, may then be transmitted via the instant messaging session to one or more other participants in the instant messaging session. The other instant messaging session participants can then use the key to access, via the instant messaging session, the data associated with the user. Users may be granted various levels of access to another user's data.Type: GrantFiled: December 22, 2009Date of Patent: September 18, 2012Assignee: Microsoft CorporationInventors: Imran Qureshi, Evan Gridley
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Patent number: 8081190Abstract: A system and method for optimizing the performance of a graphics intensive software program for graphics acceleration hardware. This system and method encompasses a procedure that validates the different functions of a 3D acceleration capable video card, decides whether to use the acceleration hardware and optimizes the software application to selectively use the functions that work on the specific video acceleration card. Functions checked include sub-pixel positioning, opacity, color replacement and fog. If these tests are successful, then the graphics acceleration is used by the software application. However, if the tests are not successful the decision is made not to use graphics accelerator. Those with ordinary skill in the art will realize that it is not necessary to perform all of the tests in a specific order.Type: GrantFiled: April 24, 2010Date of Patent: December 20, 2011Assignee: Microsoft Corp.Inventors: Ryan Hill, Imran Qureshi
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Patent number: 7990180Abstract: A fast dynamic register circuit including first and second precharge circuits, a keeper circuit and an output circuit. The first and second precharge circuits each precharge a corresponding one of a pair of precharge nodes and cooperate to minimize setup and hold times. If an input data node is low when the clock goes high, the first precharge node remains high causing the second precharge node to be discharged. Otherwise if the input node is high, the first precharge node is discharged and the second remains charged. Once either precharge node is discharged, the output state of the register remains fixed until the next rising clock edge independent of changes of the input data node. The fast dynamic register may be implemented with multiple inputs to perform common logic operations, such as OR, NOR, AND and NAND logic operations.Type: GrantFiled: September 9, 2009Date of Patent: August 2, 2011Assignee: VIA Technologies, Inc.Inventors: James R. Lundberg, Imran Qureshi
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Publication number: 20110058641Abstract: A fast dynamic register circuit including first and second precharge circuits, a keeper circuit and an output circuit. The first and second precharge circuits each precharge a corresponding one of a pair of precharge nodes and cooperate to minimize setup and hold times. If an input data node is low when the clock goes high, the first precharge node remains high causing the second precharge node to be discharged. Otherwise if the input node is high, the first precharge node is discharged and the second remains charged. Once either precharge node is discharged, the output state of the register remains fixed until the next rising clock edge independent of changes of the input data node. The fast dynamic register may be implemented with multiple inputs to perform common logic operations, such as OR, NOR, AND and NAND logic operations.Type: ApplicationFiled: September 9, 2009Publication date: March 10, 2011Applicant: VIA TECHNOLOGIES, INC.Inventors: James R. Lundberg, Imran Qureshi
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Patent number: 7761796Abstract: A system and method for graphically showing the animation order of animated elements in a presentation program or other software. The invention consists of a User Interface (UI) widget which shows the order of the animation in the presentation. This UI employs an animation On Object User Interface (OOUI), or animation tag, that is preferably a rectangular control that encloses a number, and labels the order in which objects are animated. Each animation OOUI or animation tag is associated with an object on a display during creation and editing. The animation OOUI or tag is preferably placed in close proximity to the object it is associated with, rather than in a separate window or dialog box, and is hence termed ‘On Object’. The animation tag is active and responds to computer input device selection actions. Each animation OOUI is typically associated with an animation list.Type: GrantFiled: June 28, 2009Date of Patent: July 20, 2010Assignee: Microsoft Corp.Inventors: Peter Faraday, Steven Geffner, Elaine Law, Imran Qureshi
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Patent number: 7742050Abstract: A system and method for optimizing the performance of a graphics intensive software program for graphics acceleration hardware. This system and method encompasses a procedure that validates the different functions of a 3D acceleration capable video card, decides whether to use the acceleration hardware and optimizes the software application to selectively use the functions that work on the specific video acceleration card. Functions checked include sub-pixel positioning, opacity, color replacement and fog. If these tests are successful, then the graphics acceleration is used by the software application. However, if the tests are not successful the decision is made not to use graphics accelerator. Those with ordinary skill in the art will realize that it is not necessary to perform all of the tests in a specific order.Type: GrantFiled: September 4, 2006Date of Patent: June 22, 2010Assignee: Microsoft Corp.Inventors: Ryan Hill, Imran Qureshi
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Publication number: 20100100632Abstract: Sharing data within an instant messaging session is described. A user participating in an instant messaging session may request a data access key. The key, which provides access to data associated with the user, may then be transmitted via the instant messaging session to one or more other participants in the instant messaging session. The other instant messaging session participants can then use the key to access, via the instant messaging session, the data associated with the user. Users may be granted various levels of access to another user's data.Type: ApplicationFiled: December 22, 2009Publication date: April 22, 2010Applicant: Microsoft CorporationInventors: Imran Qureshi, Evan Gridley
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Patent number: 7660904Abstract: Sharing data within an instant messaging session is described. A user participating in an instant messaging session may request a data access key. The key, which provides access to data associated with the user, may then be transmitted via the instant messaging session to one or more other participants in the instant messaging session. The other instant messaging session participants can then use the key to access, via the instant messaging session, the data associated with the user. Users may be granted various levels of access to another user's data.Type: GrantFiled: May 11, 2004Date of Patent: February 9, 2010Assignee: Microsoft CorporationInventors: Imran Qureshi, Evan Gridley
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Patent number: 7565608Abstract: A system and method for graphically showing the animation order of animated elements in a presentation program or other software. The invention consists of a User Interface (UI) widget which shows the order of the animation in the presentation. This UI employs an animation On Object User Interface (OOUI), or animation tag, that is preferably a rectangular control that encloses a number, and labels the order in which objects are animated. Each animation OOUI or animation tag is associated with an object on a display during creation and editing. The animation OOUI or tag is preferably placed in close proximity to the object it is associated with, rather than in a separate window or dialog box, and is hence termed ‘On Object’. The animation tag is active and responds to computer input device selection actions. Each animation OOUI is typically associated with an animation list.Type: GrantFiled: January 5, 2007Date of Patent: July 21, 2009Assignee: Microsoft Corp.Inventors: Peter Faraday, Steven Geffner, Elaine Law, Imran Qureshi
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Patent number: 7321243Abstract: A P-domino register has a domino stage, a write stage, an inverter, a high keeper path, a low keeper path, and an output stage. The domino stage evaluates a logic function based on at least one input data signal and a pulsed clock signal. The pulsed clock signal lags a symmetric clock signal. The domino stage pre-discharges a pre-discharged node low when the symmetric clock signal is high and opens an evaluation window when the pulsed clock signal goes low, and pulls the pre-discharged node high if it evaluates, and keeps the pre-discharged node low if it fails to evaluate. The output stage provides an output signal based on states of the pre-discharged node and a second preliminary output node.Type: GrantFiled: June 16, 2006Date of Patent: January 22, 2008Assignee: Via Technologies, Inc.Inventors: Imran Qureshi, Raymond A. Bertram
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Patent number: 7317339Abstract: An N-domino register has a domino stage, a write stage, an inverter, a high keeper path, a low keeper path, and an output stage. The domino stage evaluates a logic function based on at least one input data signal and a pulsed clock signal. The pulsed clock signal lags a symmetric clock signal. The domino stage pre-charges a pre-charged node high when the symmetric clock signal is low and opens an evaluation window when the pulsed clock signal goes high, and pulls the pre-charged node low if it evaluates, and keeps the pre-charged node high if it fails to evaluate. The output stage provides an output signal based on states of the pre-charged node and a second preliminary output node.Type: GrantFiled: June 16, 2006Date of Patent: January 8, 2008Assignee: Via Technologies, Inc.Inventors: Imran Qureshi, Raymond A. Bertram
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Publication number: 20070290719Abstract: An N-domino register has a domino stage, a write stage, an inverter, a high keeper path, a low keeper path, and an output stage. The domino stage evaluates a logic function based on at least one input data signal and a pulsed clock signal. The pulsed clock signal lags a symmetric clock signal. The domino stage pre-charges a pre-charged node high when the symmetric clock signal is low and opens an evaluation window when the pulsed clock signal goes high, and pulls the pre-charged node low if it evaluates, and keeps the pre-charged node high if it fails to evaluate. The output stage provides an output signal based on states of the pre-charged node and a second preliminary output node.Type: ApplicationFiled: June 16, 2006Publication date: December 20, 2007Applicant: VIA TECHNOLOGIES, INC.Inventors: IMRAN QURESHI, RAYMOND A. BERTRAM
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Publication number: 20070290720Abstract: A P-domino register has a domino stage, a write stage, an inverter, a high keeper path, a low keeper path, and an output stage. The domino stage evaluates a logic function based on at least one input data signal and a pulsed clock signal. The pulsed clock signal lags a symmetric clock signal. The domino stage pre-discharges a pre-discharged node low when the symmetric clock signal is high and opens an evaluation window when the pulsed clock signal goes low, and pulls the pre-discharged node high if it evaluates, and keeps the pre-discharged node low if it fails to evaluate. The output stage provides an output signal based on states of the pre-discharged node and a second preliminary output node.Type: ApplicationFiled: June 16, 2006Publication date: December 20, 2007Applicant: VIA TECHNOLOGIES, INC.Inventors: IMRAN QURESHI, RAYMOND A. BERTRAM
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Publication number: 20070146369Abstract: A system and method for graphically showing the animation order of animated elements in a presentation program or other software. The invention consists of a User Interface (UI) widget which shows the order of the animation in the presentation. This UI employs an animation On Object User Interface (OOUI), or animation tag, that is preferably a rectangular control that encloses a number, and labels the order in which objects are animated. Each animation OOUI or animation tag is associated with an object on a display during creation and editing. The animation OOUI or tag is preferably placed in close proximity to the object it is associated with, rather than in a separate window or dialog box, and is hence termed ‘On Object’. The animation tag is active and responds to computer input device selection actions. Each animation OOUI is typically associated with an animation list.Type: ApplicationFiled: January 5, 2007Publication date: June 28, 2007Applicant: Microsoft CorporationInventors: Peter Faraday, Steven Geffner, Elaine Law, Imran Qureshi