Abstract: A bone substitute composition includes a bone substitute matrix and a conditioning solution. The bone substitute matrix includes 85% to 98% by weight of alkaline calcium phosphate powder, 1% to 10% by weight of a polymer, and 1% to 5% by weight of a crosslinker. The conditioning solution includes 90% to 97% by weight of water, 1% to 5% by weight of a phosphate, and 1% to 5% by weight of a water-soluble acidic compound.

Abstract: A power module including at least one power device, an insulation thermally conductive layer, and a heat dissipation device is provided. The insulation thermally conductive layer has a patterned circuit layer. The power device is disposed on the patterned circuit layer and is electrically connected to the patterned circuit layer. The heat dissipation device includes a heat dissipation plate and a heat dissipation base. The heat dissipation plate has a first surface and a second surface opposite to each other, and the insulation thermally conductive layer is disposed on the first surface. The heat dissipation base is partially bonded to the heat dissipation plate, and a chamber is formed between the heat dissipation plate and the heat dissipation bases. The heat dissipation base has a plurality of first heat dissipation bumps located in the chamber.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate, a conductive feature on the substrate, and an electrical connection structure on the conductive feature. The electrical connection includes a first grain made of a first metal material, and a first inhibition layer made of a second metal layer that is different than the first metal material. The first inhibition layer extends vertically along a first side of a grain boundary of the first grain and laterally along a bottom of the grain boundary of the first grain.

Abstract: Abstract of Disclosure A coil for an inductive power supply system includes a metal conducting wire and a nonmetal spacing wire. The metal conducting wire and the nonmetal spacing wire are wound together to form the coil. An inductive power supply system includes a first coil for a power supply end and a second coil for a power receiving end. Each of the first coil and the second coil is formed by winding a metal conducting wire and a nonmetal spacing wire together.

Abstract: A method including forming a III-V compound layer on a substrate and implanting a main dopant in the III-V compound layer to form source and drain regions. The method further includes implanting a group V species into the source and drain regions. A semiconductor device including a substrate and a III-V compound layer over the substrate. The semiconductor device further includes source and drain regions in the III-V layer, wherein the source and drain regions comprises a first dopants and a second dopant, and the second dopant comprises a group V material.

Abstract: A two-phase immersion-cooling heat-dissipation composite structure is provided. The heat-dissipation composite structure includes a heat dissipation base, a plurality of high-thermal-conductivity fins, and at least one high-porosity solid structure. The heat dissipation base has a first surface and a second surface that face away from each other. The second surface of the heat dissipation base is in contact with a heating element immersed in a two-phase coolant. The first surface of the heat dissipation base is connected to the high-thermal-conductivity fins. The at least one high-porosity solid structure is located at the first surface of the heat dissipation base, and is connected and alternately arranged between side walls of two adjacent ones of the high-thermal-conductivity fins. Each of the high-porosity solid structure includes a plurality of closed holes and a plurality of open holes.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, a molding compound and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The at least one semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The molding compound is disposed over the interposer and laterally encapsulates the at least one semiconductor die. The molding compound laterally wraps around the interposer and the molding compound at least physically contacts a portion of the sidewalls of the interposer. The connectors are disposed on the second surface of the interposer, and are electrically connected with the at least one semiconductor die through the interposer.

Abstract: A two-phase immersion-type heat dissipation structure having acute-angle notched structures is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate, and a plurality of fins. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other, the non-fin surface is configured to be in contact with a heat source immersed in a two-phase coolant, and the fin surface is connected with the fins. More than half of the fins are functional fins, and at least one side surface of each of the functional fins has first and second surfaces defined thereon and connected to each other. An angle between the first surface and the fin surface is from 80 degrees to 100 degrees, and an angle between the second surface and the fin surface is less than 75 degrees.

Abstract: A two-phase immersion-type heat dissipation structure having fins for facilitating bubble generation is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate, and a plurality of fins. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other, the non-fin surface is configured to be in contact with a heat source immersed in a two-phase coolant, and the fin surface is connected with the plurality of fins. More than half of the fins are functional fins, and at least one side surface of each of the functional fins and the fin surface have an included angle therebetween that is from 80 degrees to 100 degrees. A center line average roughness (Ra) of the side surface is less than 3 ?m, and a ten-point average roughness (Rz) of the side surface is not less than 12 ?m.

Abstract: A semiconductor chip includes a first intellectual property block. There are a second intellectual property block and a third intellectual property block around the first intellectual property block. There is a multiple metal layer stack over the first intellectual property block, the second intellectual property block, and the third intellectual property block. An interconnect structure is situated in the upper portion of the multiple metal layer stack. The interconnect structure is configured for connecting the first intellectual property block and the second intellectual property block. In addition, at least a part of the interconnect structure extends across and over the third intellectual property block.

Abstract: A two-phase immersion-type heat dissipation structure having skived fin with high porosity is provided. The two-phase immersion-type heat dissipation structure having skived fin with high porosity includes a porous heat dissipation structure having a total porosity that is equal to or greater than 5%. The porous heat dissipation structure includes a porous substrate and a plurality of porous and skived fins. The porous substrate has a first surface and a second surface that face away from each other. The second surface of the porous substrate is configured to be in contact with a heating element that is immersed in a two-phase coolant. The plurality of porous and skived fins are integrally formed on the first surface of the porous substrate by skiving. A first porosity of the plurality of porous and skived fins is greater than a second porosity of the porous substrate.

Abstract: A vacuum battery structural assembly and a vacuum multi-cell battery module composed thereof are provided and include a first repeating unit including a first frame plate and a second frame plate with respect to the first frame plate; and an electrolyte channel defined within the first frame plate and the second frame plate to accommodate a liquid electrolyte, wherein both a surface of the first frame plate and a surface of the second frame plate include a vacuum suction area, the vacuum suction area includes a vacuum aperture and a vacuum channel, wherein the vacuum aperture is formed on at least one surface of the first frame plate and the second frame plate, the vacuum channel is positioned inside the first frame plate and the second frame plate, and is configured to generate a longitudinal pressing suction force and seal the first frame plate and the second frame plate.

Abstract: A light emitting device includes a substrate, a wall, at least one light emitting chip, a protection layer, and a reflection layer. The substrate has a mounting surface. The wall is disposed on the mounting surface and has an inner side surface. An accommodation space is defined by the inner side surface and the mounting surface. The light emitting chip has a top light emitting surface and a side light emitting surface, and is disposed in the accommodation space and on the mounting surface. The protection layer is disposed on the top light emitting surface and the side light emitting surface. A gap is formed between the protection layer and the wall. The reflection layer is disposed in the accommodation space and between the inner side surface and the side light emitting surface. The reflection layer is filled in the gap and contacts the mounting surface.

Abstract: An impeller includes a hub and a plurality of blades. The blades are arranged around the hub, and each blade includes a leading edge, a blade tip, a root portion, a trailing edge, a windward side and a leeward side. The windward side including a first turning point and a second turning point, a first vertical height difference is formed from the blade tip to the first turning point, and a second vertical height difference is formed from the first turning point to the second turning point, and the first vertical height difference is greater than the second vertical height difference. The impeller apparently reduces the noise.

Abstract: A field effect transistor includes a substrate having a transistor forming region thereon; an insulating layer on the substrate; a first graphene layer on the insulating layer within the transistor forming region; an etch stop layer on the first graphene layer within the transistor forming region; a first inter-layer dielectric layer on the etch stop layer; a gate trench recessed into the first inter-layer dielectric layer and the etch stop layer within the transistor forming region; a second graphene layer on interior surface of the gate trench; a gate dielectric layer on the second graphene layer and on the first inter-layer dielectric layer; and a gate electrode on the gate dielectric layer within the gate trench.

Abstract: A fatigue data generation method, comprising: obtaining, by the camera device, a target image; obtaining, by a processor, a target feature data from the target image, and inputting the target feature data to a fatigue analysis model which stored in a storage unit, wherein the fatigue analysis model comprises a plurality of reference physiological signals, a plurality of reference feature data, a plurality of reference fatigue data and a plurality of correlation parameters; and generating a target fatigue data according to the target feature data, the plurality of reference feature data and the plurality of correlation parameters.

Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.

Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.