Patents by Inventor In-seon Lee

In-seon Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230178456
    Abstract: A semiconductor chip may include: a body portion with a front surface and a rear surface; a pair of through electrodes penetrating the body portion; an insulating layer disposed over the rear surface of the body portion and the pair of through electrodes; and a rear connection electrode disposed over the insulating layer and connected simultaneously with the pair of through electrodes, wherein a distance between the pair of through electrodes is greater than twice a thickness of the insulating layer.
    Type: Application
    Filed: January 30, 2023
    Publication date: June 8, 2023
    Applicant: SK hynix Inc.
    Inventors: Ho Young SON, Sung Kyu KIM, Mi Seon LEE
  • Publication number: 20230172000
    Abstract: Provided is a display device. The display device comprises a first active layer disposed on a substrate and made of a first material, a second active layer disposed on the first active layer and made of a second material different from the first material, a first gate layer disposed on the second active layer, and an inorganic pattern disposed below the second active layer and overlapping a portion of the first gate layer. The second active layer includes a conductor portion disposed between a portion of the first gate layer and the inorganic pattern.
    Type: Application
    Filed: January 27, 2023
    Publication date: June 1, 2023
    Inventors: Se Wan SON, Moo Soon KO, Jin Sung AN, Jin Seok OH, Min Woo WOO, Seong Jun LEE, Wang Woo LEE, Ji Seon LEE
  • Publication number: 20230171994
    Abstract: The present disclosure relates to a light emitting display device that includes a transparent display area including a light transmission area and a normal display area, wherein the transparent display area includes: an anode including an opening; a first light blocking part filling the opening; and a second light blocking part positioned along an exterior side of the anode. A height of a highest part of the first light blocking part is different than a height of a highest part of the second light blocking part.
    Type: Application
    Filed: August 2, 2022
    Publication date: June 1, 2023
    Inventors: Wang Woo LEE, Sung Ho KIM, Seok Je SEONG, Jin Sung AN, Min Woo WOO, Seung Hyun LEE, Ji Seon LEE, Yoon-Jong CHO
  • Patent number: 11662028
    Abstract: A body covering a disk in a butterfly valve comprises: an upper body; and a lower body, wherein an inserting space is formed by combining the upper body with the lower body, the disk is inserted into the inserting space, and at least one of the upper body and the lower body includes a framework formed of a metal and a plastic layer formed on the framework.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: May 30, 2023
    Inventor: Sang Seon Lee
  • Publication number: 20230161079
    Abstract: This invention relates to an optical laminate comprising: a hard coating layer comprising polysiloxane; a primer layer; and an anti-finger print layer comprising a fluorine-containing compound, and having specific change in water contact angle and specific change in coefficient of friction, before and after conducting friction test on the anti-finger print layer; and a flexible display device including the same.
    Type: Application
    Filed: November 30, 2021
    Publication date: May 25, 2023
    Applicant: LG CHEM, LTD.
    Inventors: Myoungseok CHO, Seung Joon LIM, Yoon Bin LIM, Eun Seon LEE, Yeongkyu CHOI, Gieun PARK
  • Publication number: 20230154416
    Abstract: A display device includes a substrate, a first active pattern, a first gate electrode, a second active pattern, a second gate electrode, a first connecting pattern, and a second connecting pattern. The first connecting pattern is disposed on the second active pattern and is electrically connected to the first gate electrode, and the second connecting pattern is disposed on the first connecting pattern and is electrically connected to the first connecting pattern and the second active pattern.
    Type: Application
    Filed: January 5, 2023
    Publication date: May 18, 2023
    Inventors: Ji Seon LEE, Jin Sung AN, Seok Je SEONG, Seong Jun LEE, Se Wan SON
  • Publication number: 20230152392
    Abstract: A device for predicting a life expectancy of a fuse for a battery of an electric vehicle may include a sensor configured to generate and output current information about current flowing in the fuse, a processor, and a memory connected to the processor and configured to store a preset lookup table, the memory storing program instructions which are executable by the processor to generate fuse-life expectancy information corresponding to the fuse based on the lookup table and time corresponding to an excess when the current information exceeds a preset threshold value.
    Type: Application
    Filed: July 21, 2022
    Publication date: May 18, 2023
    Inventors: Bo Seon Lee, Kyung Ho Kim, Beom Joo Kwon, Hui Tae Yang
  • Publication number: 20230139612
    Abstract: A semiconductor die stack includes a base die and core dies stacked over the base die. Each of the base die and the core dies include a semiconductor substrate, a front side passivation layer formed over a front side of the semiconductor substrate, a back side passivation layer over a back side of the semiconductor substrate, a through-via vertically penetrating the semiconductor substrate and the front side passivation layer, and a bump, a support pattern, and a bonding insulating layer formed over the front side passivation layer. Top surfaces of the bump, the support pattern, and the bonding insulating layer are co-planar. The bump is vertically aligned with the through-via. The support pattern is spaced apart from the through-via and the bump. The support pattern includes a plurality of first bars that extend in parallel with each other in a first direction and a plurality of second bars that extend in parallel with each other in a second direction.
    Type: Application
    Filed: March 17, 2022
    Publication date: May 4, 2023
    Applicant: SK hynix Inc.
    Inventors: Jin Woong KIM, Mi Seon LEE
  • Publication number: 20230120361
    Abstract: There are provided a semiconductor and a method of fabricating the same. The semiconductor device may include a second semiconductor substrate directly bonded to a first semiconductor substrate. The first semiconductor substrate may include a first through via with an end portion protruding through a first top surface, the first top surface being a top surface of a first semiconductor substrate body, a liner extending to partially expose a side surface of the end portion of the first through via, and a first diffusion barrier layer. The liner may include a third top surface that is positioned at a lower height than a second top surface, the second top surface being a top surface of the end portion of the first through via and substantially equal to the first top surface. Alternatively, the liner may include a third surface positioned at a height that is lower than the second top surface and higher than the first top surface.
    Type: Application
    Filed: March 8, 2022
    Publication date: April 20, 2023
    Applicant: SK hynix Inc.
    Inventors: Mi Seon LEE, Sung Kyu KIM, Jong Hoon KIM
  • Publication number: 20230118164
    Abstract: An apparatus for data augmentation includes a mode separating unit generating minor class fake data from a latent vector, an embedding vector generating unit generating embedding vectors for major class original data, minor class original data, and the minor class fake data through a metric network, an auxiliary classifying unit classifying a class of the embedding vectors from the embedding vector generating unit, and feedbacking the classified result in the mode separating unit, and a classifying unit determining whether the input data is authentic by receiving the embedding vector of the minor class original data and the embedding vector of the minor class fake data from the embedding vector generating unit, and feedbacking the determined result in the mode separating unit.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 20, 2023
    Inventors: Min Jung Kim, Young Seon Lee, No Seong Park, Ji Hyeon Hyeong, Ja Young KIM
  • Patent number: 11594588
    Abstract: Provided is a display device. The display device comprises a first active layer disposed on a substrate and made of a first material, a second active layer disposed on the first active layer and made of a second material different from the first material, a first gate layer disposed on the second active layer, and an inorganic pattern disposed below the second active layer and overlapping a portion of the first gate layer. The second active layer includes a conductor portion disposed between a portion of the first gate layer and the inorganic pattern.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: February 28, 2023
    Inventors: Se Wan Son, Moo Soon Ko, Jin Sung An, Jin Seok Oh, Min Woo Woo, Seong Jun Lee, Wang Woo Lee, Ji Seon Lee
  • Patent number: 11594558
    Abstract: A display device includes a first active pattern, a first conductive pattern including a gate electrode overlapping the first active pattern, a first gate line overlapping the first active pattern and extending in a first direction, and a second gate line extending in the first direction, a second conductive pattern disposed on the first conductive pattern and including a third gate line extending in the first direction and a fourth gate line extending in the first direction, a second active pattern disposed on the second conductive pattern and including a material different from a material of the first active pattern, and a third conductive pattern disposed on the second active pattern and including a first upper electrode overlapping the third gate line and connected to the third gate line, and a second upper electrode overlapping the fourth gate line and connected to the fourth gate line.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: February 28, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jin Sung An, Seok Je Seong, Seong Jun Lee, Ji Seon Lee
  • Patent number: 11594471
    Abstract: A semiconductor chip may include: a body portion with a front surface and a rear surface; a pair of through electrodes penetrating the body portion; an insulating layer disposed over the rear surface of the body portion and the pair of through electrodes; and a rear connection electrode disposed over the insulating layer and connected simultaneously with the pair of through electrodes, wherein a distance between the pair of through electrodes is greater than twice a thickness of the insulating layer.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: February 28, 2023
    Assignee: SK hynix Inc.
    Inventors: Ho Young Son, Sung Kyu Kim, Mi Seon Lee
  • Patent number: 11592135
    Abstract: Various fittings capable of preventing distortion are disclosed. The fitting comprises a metal member configured to have at least two sub metal members and a body. Here, the sub metal members are included in the body, and the body is formed of plastic.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: February 28, 2023
    Inventor: Sang Seon Lee
  • Patent number: 11581390
    Abstract: A display device including: a substrate; an active layer, and including channel and conductive regions; a first conductive layer including a driving gate electrode and a scan line in a first direction; a second conductive layer including a storage line; a third conductive layer including a first connecting member above the storage line; an insulating layer between the storage line and the first connecting member; and a data line and a driving voltage line crossing the scan line in a second direction, wherein the first connecting member electrically connects the driving gate electrode and a conductive region, the driving voltage line overlaps the first connecting member, the insulating layer includes first and second sub-insulating layers, and an edge of the second sub-insulating layer substantially overlaps an edge of the first connecting member in a thickness direction of the display device.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: February 14, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jin Sung An, Young Woo Park, Se Wan Son, Moo Soon Ko, Jeong-Soo Lee, Ji Seon Lee, Deuk Myung Ji
  • Patent number: 11580916
    Abstract: A display device includes a substrate, a first active pattern, a first gate electrode, a second active pattern, a second gate electrode, a first connecting pattern, and a second connecting pattern. The first connecting pattern is disposed on the second active pattern and is electrically connected to the first gate electrode, and the second connecting pattern is disposed on the first connecting pattern and is electrically connected to the first connecting pattern and the second active pattern.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: February 14, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Ji Seon Lee, Jin Sung An, Seok Je Seong, Seong Jun Lee, Se Wan Son
  • Publication number: 20230041019
    Abstract: A device corrects an indirect lighting color in response to changes in a vehicle interior finishing material. An input unit of the device receives a finishing material color of a vehicle interior and a target indirect lighting color. A light source control map of the device includes light source control signals of indirect lighting based on finishing material colors and target indirect lighting colors. A controller of the device generates a light source control signal according to the finishing material color and the target indirect lighting color input to the input unit from the light source control map. The controller also corrects the color of a light source of control target indirect lighting by the generated light source control signal.
    Type: Application
    Filed: June 21, 2022
    Publication date: February 9, 2023
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION
    Inventors: Cheol Min Park, Dae Seon Lee, Jung Hyun Cho, Kwang Il Chang, Nu Ri Jeon
  • Publication number: 20230028400
    Abstract: A display device comprises a substrate including display and peripheral areas, a semiconductor element, a pixel structure, and a plurality of dummy patterns. The semiconductor element is disposed in the display area on the substrate, and the pixel structure is disposed on the semiconductor element. The dummy patterns which have stacked structure are disposed in the peripheral area on the substrate, and contain a material identical to a material constituting the semiconductor element. The dummy patterns are arranged in a grid shape in different layers, and each of the dummy patterns includes a central portion and an edge portion surrounding the central portion. The edge portions of dummy patterns which are adjacent to each other in the different layers among the dummy patterns are overlapped each other in a direction from the substrate to the pixel structure.
    Type: Application
    Filed: September 30, 2022
    Publication date: January 26, 2023
    Inventors: Sewan SON, Moo Soon KO, Ji Ryun PARK, Jin Sung AN, Min Woo WOO, Seong Jun LEE, Wang Woo LEE, Jeong-Soo LEE, Ji Seon LEE, Deuk Myung JI
  • Publication number: 20230012771
    Abstract: A display device includes a substrate, a polycrystalline semiconductor layer including a channel of a driving transistor, and a channel of a seventh transistor, a gate electrode of the driving transistor overlapping the channel thereof, a gate electrode of the seventh transistor overlapping the channel thereof, an oxide semiconductor layer including a channel of a fourth transistor, a gate electrode thereof overlapping the channel of the fourth transistor, a first initialization voltage line connected to a first electrode of the fourth transistor, the first initialization voltage line and the gate electrode of the fourth transistor being position on a same layer, and a second initialization voltage line connected to a second electrode of the seventh transistor, the second initialization voltage line and the first initialization voltage line being positioned on different layers from each other.
    Type: Application
    Filed: September 26, 2022
    Publication date: January 19, 2023
    Inventors: Jin Sung AN, Seok Je SEONG, Ji Seon LEE, Se Wan SON
  • Patent number: D986935
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: May 23, 2023
    Inventors: Nam Seon Lee, Min Seok Oh, Young Heum Kim