Abstract: A voltage regulator control circuit includes a transistor input controller. The transistor input controller forces a slew control signal on its slew control output to a state responsive to a change in a load condition and forces an ON signal to a state on its first transistor control output. A first transistor has a first control input and first and second current terminals. A second transistor couples to the first transistor. A driver has a slew control input, a driver input, and a driver output. The driver input couples to the first transistor control output. The driver output couples to the first control input. Responsive to a first logic state of the slew control signal and a first state of the ON signal, the driver provides a higher current to the first control input, and responsive to a second state of the slew control signal and a first state of the ON signal, the driver provides a lower current to the first control input.

Abstract: This disclosure describes techniques for controlling a power supply voltage for a high-side gate driver that is used in a power converter. In some examples, in response to an overvoltage condition that occurs on an input voltage lead of a power converter, a power converter may decouple a terminal of a charge pump capacitor from the input voltage lead, and couple the terminal of the capacitor to a reference voltage lead. In further examples, in response to an overvoltage condition that occurs on an input voltage lead of a power converter, a power converter may turn off both switching transistors.

Abstract: An embodiment semiconductor structure includes a metal layer. The semiconductor structure also includes a redistribution layer (RDL) structure including an RDL platform and a plurality of RDL pillars disposed between the RDL platform and the metal layer. Additionally, the semiconductor structure includes an under-bump metal (UBM) layer disposed on the RDL platform and a solder bump disposed on the UBM layer, where the UBM layer, the RDL platform, and the RDL pillars form an electrical connection between the solder bump and the metal layer.

Abstract: This disclosure describes techniques for controlling a power supply voltage for a high-side gate driver that is used in a power converter. In some examples, in response to an overvoltage condition that occurs on an input voltage lead of a power converter, a power converter may decouple a terminal of a charge pump capacitor from the input voltage lead, and couple the terminal of the capacitor to a reference voltage lead. In further examples, in response to an overvoltage condition that occurs on an input voltage lead of a power converter, a power converter may turn off both switching transistors.

Abstract: This disclosure describes techniques for controlling a power supply voltage for a high-side gate driver that is used in a power converter. In some examples, in response to an overvoltage condition that occurs on an input voltage lead of a power converter, a power converter may decouple a terminal of a charge pump capacitor from the input voltage lead, and couple the terminal of the capacitor to a reference voltage lead. In further examples, in response to an overvoltage condition that occurs on an input voltage lead of a power converter, a power converter may turn off both switching transistors.

Abstract: This disclosure describes techniques for controlling a power supply voltage for a high-side gate driver that is used in a power converter. In some examples, in response to an overvoltage condition that occurs on an input voltage lead of a power converter, a power converter may decouple a terminal of a charge pump capacitor from the input voltage lead, and couple the terminal of the capacitor to a reference voltage lead. In further examples, in response to an overvoltage condition that occurs on an input voltage lead of a power converter, a power converter may turn off both switching transistors.

Abstract: An optical disk drive system associated with a laser diode is described. The optical disk drive system comprises a current generator for receiving input signals; a current switch coupled to receive timing signals; a current driver coupled to receive output signals from the current switch and the current generator, the current driver further comprising a driver with wave shape control selected from the group consisting of a laser diode read driver and a laser diode write driver, wherein the driver with shape control is operative for transmitting at least one output signal that is a scaled version of at least one of the output signals received from the current generator, wherein the current driver is operative for transmitting at least one output signal driving the laser diode.

Abstract: An optical disk drive system associated with a laser diode is described. The optical disk drive system comprises a current generator for receiving input signals; a current switch coupled to receive timing signals; a current driver coupled to receive output signals from the current switch and the current generator, the current driver further comprising a driver with wave shape control selected from the group consisting of a laser diode read driver and a laser diode write driver, wherein the driver with shape control is operative for transmitting at least one output signal that is a scaled version of at least one of the output signals received from the current generator, wherein the current driver is operative for transmitting at least one output signal driving the laser diode.

Abstract: An optical disk drive system associated with a laser diode is described. The optical disk drive system comprises a current generator for receiving input signals; a current switch coupled to receive timing signals; a current driver coupled to receive output signals from the current switch and the current generator, the current driver further comprising a driver with wave shape control selected from the group consisting of a laser diode read driver and a laser diode write driver, wherein the driver with shape control is operative for transmitting at least one output signal that is a scaled version of at least one of the output signals received from the current generator, wherein the current driver is operative for transmitting at least one output signal driving the laser diode.

Abstract: An input signal processing system is described. It comprises a first transconductance device having a first input, second input, and an output, wherein the first input is coupled to receive the input signal; a first resistor coupled to a first input of the first transconductance device, wherein the first resistor converts the input current signal to an input voltage signal; a first voltage-current converter coupled to the output, the second input, the resistor, and a low voltage supply, wherein the first voltage-current converter is operative for converting the input voltage signal to a input current signal; and a low pass filter having an input coupled to the voltage converter for filtering noise from the input current signal.

Abstract: An input current channel device is described. This device comprises a first terminal for receiving a reference signal; a second terminal for receiving a first target signal; a pass through device coupled to the first terminal, the pass through device operative for transmitting a delayed reference signal in response to receiving the reference signal; a first combination logic device coupled to the first terminal and the second terminal, the first combination logic device operative for transmitting a first combination logic signal in response to receiving the reference signal and the first target signal; a selection device coupled for receiving the delayed reference signal, the first combination logic signal, and a first synchronization signal, the selection device operative for selectively transmitting a second synchronization signal, and wherein selectively transmitting the second synchronization signal reduces skew between the reference channel and the first target channel.

Abstract: An optical disk drive system associated with a laser diode is described. The optical disk drive system comprises a current generator for receiving input signals; a current switch coupled to receive timing signals; a current driver coupled to receive output signals from the current switch and the current generator, the current driver further comprising a driver with wave shape control selected from the group consisting of a laser diode read driver and a laser diode write driver, wherein the driver with shape control is operative for transmitting at least one output signal that is a scaled version of at least one of the output signals received from the current generator, wherein the current driver is operative for transmitting at least one output signal driving the laser diode.

Abstract: An input signal processing system is described. It comprises a first transconductance device having a first input, second input, and an output, wherein the first input is coupled to receive the input signal; a first resistor coupled to a first input of the first transconductance device, wherein the first resistor converts the input current signal to an input voltage signal; a first voltage-current converter coupled to the output, the second input, the resistor, and a low voltage supply, wherein the first voltage-current converter is operative for converting the input voltage signal to a input current signal; and a low pass filter having an input coupled to the voltage converter for filtering noise from the input current signal.

Abstract: An input current channel device is described. This device comprises a first terminal for receiving a reference signal; a second terminal for receiving a first target signal; a pass through device coupled to the first terminal, the pass through device operative for transmitting a delayed reference signal in response to receiving the reference signal; a first combination logic device coupled to the first terminal and the second terminal, the first combination logic device operative for transmitting a first combination logic signal in response to receiving the reference signal and the first target signal; a selection device coupled for receiving the delayed reference signal, the first combination logic signal, and a first synchronization signal, the selection device operative for selectively transmitting a second synchronization signal, and wherein selectively transmitting the second synchronization signal reduces skew between the reference channel and the first target channel.

Abstract: System and method for write current drivers for inductive heads used in mass storage drives. A preferred embodiment comprises a write current circuit coupled to an inductive write head, a MOS transistor boost circuit and a matching circuit, both coupled to the write current circuit. The write current circuit provides a first current to the inductive write head, while the MOS transistor boost circuit provides a second current for a specified duration to the inductive write head when the MOS transistor boost circuit receives a control signal. The matching circuit selectively decouples a resistive element from the inductive write head when it receives the control signal. The MOS transistor boost circuit can accelerate the transition in a switching of the polarity of the write current and the matching circuit helps to reduce ringing without negatively affecting the speed of the polarity switching by decoupling when the second current is provided.

Abstract: A fly height controller circuit for a disk drive head having a resistive heater is disclosed. The fly height controller includes an error amplifier that controls a variable current source driving the resistive heater. The error amplifier compares a desired heater power signal with a feedback power signal that is generated by a multiplier. The multiplier receives a signal corresponding to the resistive heater current, for example as generated by a second variable current source also controlled by the error amplifier, and a signal corresponding to a voltage across the resistive heater. A first differential amplifier develops a differential voltage corresponding to the heater voltage. A second differential amplifier is biased by the resistive heater current signal, and receives the differential voltage form the first differential amplifier. A differential current generated by the second differential amplifier produces the feedback power signal as an output voltage.

Abstract: An impedance controlling circuit (152) is connected across an MR head (42) and has two current paths, each including a control transistor (154,156), a current path resistor (160,158), and a biasing circuit (162,164) in series. Each side of the MR head 42 is connected between a respective one of the current path resistors (158,160) and the biasing circuits (162,168). A shunt resistor (170) is connected between the control transistors (154,156) and the current path resistors (158,160) in each of the current paths. When the control transistors (154,156) are not conducting, the current path resistors (158,160) and the shunt resistor (170) shunt the MR head (42).

Abstract: A differential circuit to read differential data from a disk by a voltage bias includes a read circuit having a read circuit pole to read the differential data from the disk by maintaining the voltage bias and a feedback circuit having a feedback pole to sense deviations in the voltage and to adjust the voltage in response to the deviations. The read circuit pole is separated from the feedback pole in frequency.

Abstract: A differential circuit to read differential data from a disk by a current bias on a plurality of read heads includes a read circuit to read the differential data from the disk by maintaining the current bias. The current is below a maximum current of a read head having the lowest maximum voltage of said plurality of read heads.

Abstract: An impedance controlling circuit (152) is connected across an MR head (42) and has two current paths, each including a control transistor (154,156), a current path resistor (160,158), and a biasing circuit (162,164) in series. Each side of the MR head 42 is connected between a respective one of the current path resistors (158,160) and the biasing circuits (162,168). A shunt resistor (170) is connected between the control transistors (154,156) and the current path resistors (158,160) in each of the current paths. When the control transistors (154,156) are not conducting, the current path resistors (158,160) and the shunt resistor (170) shunt the MR head (42).