Abstract: A magnetic sensor includes: a sensor head having a magnetic material; a drive unit configured to energize the sensor head; a pickup coil close to the sensor head; and an information processing unit configured to generate a bias magnetic field by energizing the pickup coil and detect a signal corresponding to an induced voltage generated in the pickup coil, in which the information processing unit generates a difference signal indicating a difference between a first signal corresponding to a first voltage generated in the pickup coil when the sensor head is in an energized state and a second signal corresponding to a second voltage generated in the pickup coil when the sensor head is in a non-energized state.

Abstract: A magnetic sensor includes a magneto-sensitive body whose electromagnetic properties change under an action of an external magnetic field, a coil disposed to obtain an induced voltage proportional to the external magnetic field, a sampler configured to sample the induced voltage generated in the coil and obtains a sampling voltage, and an automatic correction circuit configured to relatively adjust a rise timing of a magneto-sensitive body clock for driving the magneto-sensitive body and a rise timing of a sampler clock for driving the sampler according to the sampling voltage.

Abstract: According to one embodiment, a circuit comprises a first resistor configured to have one end to which a first voltage is input and the other end which outputs a second voltage and a first amplifier configured to have an inverting input connected to the other end of the first resistor and a noninverting input to which a third voltage is input. The circuit further comprises a first capacitor configured to have one end to which an output of the first amplifier is input and the other end to which the other end of the first resistor is connected. An output of the first amplifier or an output of a second amplifier connected to the other end of the first resistor is a fourth voltage. In the circuit, the first resistor and a mirror capacitance composed of the first capacitor and the first amplifier constitute a low-pass filter.

Abstract: The A/D conversion circuit according to one aspect of the present invention includes: a first sampling capacitor; a first sampling switch; a buffer circuit; a second sampling capacitor; a second sampling switch; a first converter; a first reset switch; and a second reset switch. The first and second sampling switches are turned on to track voltage to the first sampling capacitor and to sample buffer voltage to the second sampling capacitor through the buffer circuit. The first sampling switch is turned off to hold voltage. The second sampling switch is turned off so that the first converter reads the voltage from the second sampling capacitor to perform A/D conversion thereon. After that, the first and second reset switches reset the first and second sampling capacitors.

Abstract: According to one embodiment, a circuit comprises a first resistor configured to have one end to which a first voltage is input and the other end which outputs a second voltage and a first amplifier configured to have an inverting input connected to the other end of the first resistor and a noninverting input to which a third voltage is input. The circuit further comprises a first capacitor configured to have one end to which an output of the first amplifier is input and the other end to which the other end of the first resistor is connected. An output of the first amplifier or an output of a second amplifier connected to the other end of the first resistor is a fourth voltage. In the circuit, the first resistor and a mirror capacitance composed of the first capacitor and the first amplifier constitute a low-pass filter.

Abstract: According to one embodiment, a first switch transistor and a second switch transistor convert an input current to a first current and a second current by performing a switching operation on the basis of differential input voltages, respectively. An input current source supplies the input current to the first and second switch transistors. A noise current generating circuit generates a dummy current to simulate a noise current flowing through the input current source. A third switch transistor and a fourth switch transistor convert the dummy current to a third current and a fourth current by performing a switching operation on the basis of differential input voltages and negatively superimposes the third current and the fourth current on the first and second currents, respectively.

Abstract: The A/D conversion circuit according to one aspect of the present invention includes: a first sampling capacitor; a first sampling switch; a buffer circuit; a second sampling capacitor; a second sampling switch; a first converter; a first reset switch; and a second reset switch. The first and second sampling switches are turned on to track voltage to the first sampling capacitor and to sample buffer voltage to the second sampling capacitor through the buffer circuit. The first sampling switch is turned off to hold voltage. The second sampling switch is turned off so that the first converter reads the voltage from the second sampling capacitor to perform A/D conversion thereon. After that, the first and second reset switches reset the first and second sampling capacitors.

Abstract: A communication device includes: a first oscillator to generate a local signal based on a control signal for regulating at least one of phase oise and jitter in the local signal; a frequency converter to convert a first signal having first frequency to a second signal having second frequency by using the local signal; a filter to remove undesired signal component from the second signal and output a third signal; and a controller to generate the control signal based on the second signal and the third signal.