Abstract: Methods and systems for a configurable front end are disclosed. Aspects of one method may include a transceiver on a single chip that may comprise a power amplifier (PA) and a low noise amplifier (LNA). The PA may amplify signals to be transmitted over a range of output transmit power. An upper limit for a power range may of substantially 12 dBm. The LNA may be tolerant to PA signals by, for example, being configured to follow signal voltages generated from an output of the power amplifier. For example, each input transistor of the LNA may be isolated from other transistors in the LNA. Accordingly, the input transistors may float since they may not be tied to a voltage level via other transistors. This may allow the input transistors to avoid damage. The transceiver may also be configured for differential RF input, differential RF output, single-ended RF input, and/or single-ended RF output.

Abstract: Methods and systems for a configurable front end are disclosed. Aspects of one method may include a transceiver on a single chip that may comprise a power amplifier (PA) and a low noise amplifier (LNA). The PA may amplify signals to be transmitted over a range of output transmit power. An upper limit for a power range may of substantially 12 dBm. The LNA may be tolerant to PA signals by, for example, being configured to follow signal voltages generated from an output of the power amplifier. For example, each input transistor of the LNA may be isolated from other transistors in the LNA. Accordingly, the input transistors may float since they may not be tied to a voltage level via other transistors. This may allow the input transistors to avoid damage. The transceiver may also be configured for differential RF input, differential RF output, single-ended RF input, and/or single-ended RF output.

Abstract: An apparatus and method for allowing two different signal paths to be coupled to a multi-tap transformer balun. The multi-tap transformer has a first port, which is coupled to a single antenna, and two or more differential secondary ports. Each port has one or more taps, which are optimized separately for each of the signal paths, allowing each of the two or more signal paths to operate in different frequency bands. Use of the method of the invention can decrease the number of external components and integrated circuit package pins, and reduce the area required for each signal path on an integrated circuit die, a printed circuit board, or the like.

Abstract: A multi-level power amplifier architecture using a multi-tap transformer implemented on a single CMOS integrated circuit wireless communications device is described. By providing a multi-tap transformer for coupling a plurality of power amplifiers to a shared output impedance, such as an antenna, power transmission may be made at different levels while maintaining efficiency. With a multi-tap transformer having “N” taps featuring “N” different impedance levels, each tap may be connected to an amplifier cell which delivers power into the transformer at the tap for coupling to the output load. Any one of the “N” amplifier cells can be turned on at once along with any combination of the “N” amplifier cells.

Abstract: A multi-level power amplifier architecture using a multi-tap transformer implemented on a single CMOS integrated circuit wireless communications device is described. By providing a multi-tap transformer for coupling a plurality of power amplifiers to a shared output impedance, such as an antenna, power transmission may be made at different levels while maintaining efficiency. With a multi-tap transformer having “N” taps featuring “N” different impedance levels, each tap may be connected to an amplifier cell which delivers power into the transformer at the tap for coupling to the output load. Any one of the “N” amplifier cells can be turned on at once along with any combination of the “N” amplifier cells.

Abstract: An apparatus and method for allowing two different signal paths to be coupled to a multi-tap transformer balun. The multi-tap transformer has a first port, which is coupled to a single antenna, and two or more differential secondary ports. Each port has one or more taps, which are optimized separately for each of the signal paths, allowing each of the two or more signal paths to operate in different frequency bands. Use of the method of the invention can decrease the number of external components and integrated circuit package pins, and reduce the area required for each signal path on an integrated circuit die, a printed circuit board, or the like.

Abstract: A multi-level power amplifier architecture using a multi-tap transformer implemented on a single CMOS integrated circuit wireless communications device is described. By providing a multi-tap transformer for coupling a plurality of power amplifiers to a shared output impedance, such as an antenna, power transmission may be made at different levels while maintaining efficiency. With a multi-tap transformer having “N” taps featuring “N” different impedance levels, each tap may be connected to an amplifier cell which delivers power into the transformer at the tap for coupling to the output load. Any one of the “N” amplifier cells can be turned on at once along with any combination of the “N” amplifier cells.

Abstract: A multi-level power amplifier architecture using a multi-tap transformer implemented on a single CMOS integrated circuit wireless communications device is described. By providing a multi-tap transformer for coupling a plurality of power amplifiers to a shared output impedance, such as an antenna, power transmission may be made at different levels while maintaining efficiency. With a multi-tap transformer having “N” taps featuring “N” different impedance levels, each tap may be connected to an amplifier cell which delivers power into the transformer at the tap for coupling to the output load. Any one of the “N” amplifier cells can be turned on at once along with any combination of the “N” amplifier cells.

Abstract: An on-chip impedance matching includes a transistor and a tank circuit. The transistor is operably coupled to receive an input signal. The tank circuit is operably coupled to the transistor, wherein a tap of the tank circuit provides an output of the on-chip impedance matching power amplifier, wherein the tank circuit is tuned with respect to an antenna load of the on-chip impedance matching power amplifier.

Abstract: A radio frequency circuit includes a first differential RF path and a second differential path. The first differential RF path includes at least one RF block that includes a first differential section and a second differential section, wherein the first differential section is symmetrical with the second differential section. The second differential RF path includes at least one RF block that includes a first differential section and a second differential section, wherein the first differential section is symmetrical with the second differential section. The first and second half differential sections of the at least one RF block of the first differential RF path are symmetrically placed on at least one layer around the first and second half differential sections of the at least one RF block of the second differential RF path, wherein the first and second half differential sections of the at least one RF block of the second differential RF path are fabricated on the at least one layer.