Abstract: Disclosed is a single phase-locked loop (50, 350) providing tuning over a very large bandwidth for use in wide band carrier tracking and clock recovery systems. In a first embodiment, a DC signal is formed representative of a phase difference between an input signal changing with time and a return signal. The DC signal is applied to a narrow band voltage controlled oscillator (68) which converts the DC signal back to an AC signal. The AC signal is level shifted to form a clocking pulse for an accumulator (80) of a direct digital synthesizer (72). A digital command word is also applied to tyhe accumulator (80), such that the digital command word represents a coarse tuning of the input frequency. The clocking pulse from the narrow band VCO (68) supplies a fine tuning of the input frequency.

Abstract: Disclosed is a single phase-locked loop (50, 350) providing tuning over a very large bandwidth for use in wide band carrier tracking and clock recovery systems. In a first embodiment, a DC signal is formed representative of a phase difference between an input signal changing with time and a return signal. The DC signal is applied to a narrow band voltage controlled oscillator (68) which converts the DC signal back to an AC signal. The AC signal is level shifted to form a clocking pulse for an accumulator (80) of a direct digital synthesizer (72). A digital command word is also applied to the accumulator (80), such that the digital command word represents a coarse tuning of the input frequency. The clocking pulse from the narrow band VCO (68) supplies a fine tuning of the input frequency. In a second embodiment, the DC representative phase signal is applied to an analog-to-digital converter (364) which produces an N-bit word representative of the phase difference.

Abstract: The tuner section of a communications receiver 10 includes a gallium arsenide voltage controlled oscillator 48 for upconverting the received signal in mixer 18. Phase noise and post tuning drift associated with oscillator 48 is impressed onto the signal supplied by a second oscillator network 46. Thus, the outputs of mixers 18 and 78 both contain noise and post tuning drift associated with the gallium arsenide oscillator 48. Mixer 28 is used to substract the noise and drift component on line 30 from that on line 32 to thereby provide an output 14 which is substantially free of the noise and drift associated with the efficient, but noisy gallium arsenide VCO 48.

Abstract: An improved cascadable adder (11) which, through the use of merged logic, provides high speed operation in the presence of input loading and internal fan-out limitations. The invention may be implemented in gallium arsenide technology and includes a first circuit (13) for exclusive ORing first bits (A.sub.1, B.sub.1) of first and second digital words (A, B) respectively; and a second circuit (37) operatively connected to the first circuit (13) for generating, with only two gate delays, a carry (C.sub.1) associated with the summing of the first bits.

Abstract: A direct digital frequency synthesizer including a counter circuit for receiving input signal pulses and for providing a corresponding output signal after receiving a number of input signal pulses, the number being selected based on the state of a control signal. The invention includes a circuit for generating a substantially random sequence of numbers and a comparator circuit for comparing a respective number of the substantially random numbers to a predetermined number and for providing the control signal in response thereto.

Abstract: A digital phase frequency discriminator is disclosed that eliminates crossover distortion problem inherent in previous discriminator without a corresponding increase in complexity in the circuit. The discriminator includes four cross-coupled RS latches and a reset gate. The reset gate is coupled to the latches such that additional gate delays are provided to ensure that the output signals of the discriminator reach these full logic amplitude and thereby allow for accurate phase frequency discrimination to occur.

Abstract: A probe apparatus is provided for on-wafer testing of an electrical circuit, the probe apparatus comprising a base plate formed from an electrically conductive material, the base plate including top and bottom surfaces; a substrate formed from a dielectric material, the substrate including top and bottom surfaces, the top surface of the substrate being electrically connected to the bottom surface of the base plate; at least one microstrip transmission line secured to the bottom surface of the substrate, the microstrip line including a first end and a second end; a coaxial connector including a center conductor in electrical contact with the first end of the microstrip transmission line; and a needle probe electrically connected to the second end of the microstrip transmission line, the needle probe extending in a direction substantially away from the base plate.

Abstract: A process and related product in which ohmic contacts are formed in semiconductor devices employing compound substrates such as gallium arsenide. In the disclosed embodiment, a germanium layer (18) is deposited in those areas (14) in which ohmic contact is required and is subsequently diffused into a layer 20 of the substrate during a conventional annealing step required to relieve damage caused to the substrate during a prior conventional ion implantation step. As a result of the diffusion of the germanium, good ohmic contact can be made by deposition of a conductive metal 26, such as gold. Thus, a common metalization step can be employed to form both the ohmic contact regions and rectifying contact regions used as gates in field effect transistors.