Patents by Inventor Irith Pomeranz

Irith Pomeranz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Deterministic test pattern generation for designs with timing exceptions
    Patent number: 10977400
    Abstract: Systems and methods for a deterministic automatic test generation (ATPG) process including Timing Exception ATPG (TEA). A method includes performing an automated test pattern generation (ATPG) process that uses timing exception information to generate a test pattern for a targeted fault of a circuit design with at least one timing exception path. The method includes testing the targeted fault of the circuit design using the test pattern to produce a test result for the targeted fault.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: April 13, 2021
    Assignee: Mentor Graphics Corporation
    Inventors: Wu-Tung Cheng, Kun-Han Tsai, Naixing Wang, Chen Wang, Xijiang Lin, Mark A. Kassab, Irith Pomeranz
  • DETERMINISTIC TEST PATTERN GENERATION FOR DESIGNS WITH TIMING EXCEPTIONS
    Publication number: 20200410065
    Abstract: Systems and methods for a deterministic automatic test generation (ATPG) process including Timing Exception ATPG (TEA). A method includes performing an automated test pattern generation (ATPG) process that uses timing exception information to generate a test pattern for a targeted fault of a circuit design with at least one timing exception path. The method includes testing the targeted fault of the circuit design using the test pattern to produce a test result for the targeted fault.
    Type: Application
    Filed: August 22, 2019
    Publication date: December 31, 2020
    Inventors: Wu-Tung Cheng, Kun-Han Tsai, Naixing Wang, Chen Wang, Xijiang Lin, Mark A. Kassab, Irith Pomeranz