Abstract: Various systems, methods, and programs embodied in a computer readable medium are provided for determining a worst-case impedance and worst-case voltage of a power supply loop coupled to a power input of a die. In various embodiments, the worst-case impedance of a power supply loop is determined and a reference voltage at the power input of the die associated with an average current generated at a power supply included in the power supply loop. A maximum change in a current at the power input of the die is also measured and an estimate of a worst-case voltage at the power input of the die is calculated based upon the worst-case impedance, the reference voltage, and the maximum change in the current.

Abstract: Various systems, methods, and programs embodied in a computer readable medium are provided for determining a worst-case impedance and worst-case voltage of a power supply loop coupled to a power input of a die. In various embodiments, the worst-case impedance of a power supply loop is determined and a reference voltage at the power input of the die associated with an average current generated at a power supply included in the power supply loop. A maximum change in a current at the power input of the die is also measured and an estimate of a worst-case voltage at the power input of the die is calculated based upon the worst-case impedance, the reference voltage, and the maximum change in the current.

Abstract: A method comprises generating first and second current levels and measuring the first and second current levels. The method further comprises alternately generating the first and second current levels repeatedly to generate a periodic current waveform, and measuring the voltage at at least one port in a system a plurality of times to obtain a plurality of sets of voltage measurements. The plurality of sets of voltage measurements are averaged. The method further comprises alternately generating the first and second current levels repeatedly at a predetermined number of different clock frequencies, determining a Fourier component of the averaged voltage measurements to determine clock frequency-dependent noises, removing the clock frequency-dependent noises to generate a filtered average voltage, and determining an impedance by dividing a Fourier component of the filtered average voltage by a Fourier component of the periodic current waveform having alternating first and second current levels.

Abstract: Disclosed are various systems, methods, and programs embodied in computer readable mediums for measuring current in a central processor unit (CPU) package. To measure the current, a voltage V(t) is determined in situ across at a power input of a die in the CPU package while running a computer process on the die. Then, the Fourier transform of the voltage Ff(V(t)) is calculated from the voltage V(t). The current at the power input of the die in the frequency domain (Ff(Idd(t))) can then be calculated from the voltage Ff(V(t)) and impedance Zf, where the impedance Zf comprises an impedance of a power supply loop coupled to the power input as a function of frequency. Finally, the current Idd(t) at the power input of the die is determined in the time domain by calculating the inverse Fourier transform of the current in the frequency domain Ff(Idd(t)).

Abstract: A method of measuring impedance in a system comprises holding a microprocessor in reset mode and providing a clock to the microprocessor at a frequency FCLK while measuring a first current level, providing the clock at frequency FCLK/N while measuring a second current level, where N is a positive integer, measuring the voltage at a plurality of ports in the system a plurality of times to obtain a plurality of sets of voltage measurements while holding the microprocessor in reset mode, toggling the clock frequency between FOLK and FOLK/N, and generating a periodic current waveform. The voltage measurements are averaged. The method further comprises determining and removing clock frequency-dependent noises to generate a filtered average voltage, and determining an impedance by dividing a Fourier component of the filtered average voltage by a Fourier component of the periodic current waveform having alternating first and second current levels.

Abstract: A method comprises generating a first current level, measuring the first current level, generating a second current level, and measuring the second current level. The method further comprises alternately generating the first and second current levels repeatedly to generate a generate a periodic current waveform, and measuring the voltage at at least one port in a system a plurality of times to obtain a plurality of sets of voltage measurements. The plurality of sets of voltage measurements are averaged.

Abstract: A method of measuring impedance in a system having a microprocessor comprises holding the microprocessor in reset mode and providing a clock to the microprocessor at a frequency FCLK while measuring a first current level, providing the clock at frequency FCLK/N while measuring a second current level, measuring the voltage at a plurality of ports in the system a plurality of times to obtain a plurality of sets of voltage measurements while holding the microprocessor in reset mode, toggling the clock frequency between FCLK and FCLK/N, and generating a periodic current waveform. The plurality of sets of voltage measurements are averaged.

Abstract: A method comprises exciting a system with an input having predetermined maximum and minimum input values, selecting time points t1 and tj in a system response having a plurality of maximum response values at time points ti and a plurality of minimum response values at time points tj. A maximum worst-case excitation input is generated. The maximum worst-case excitation input has a positive transition from the predetermined minimum input value to the predetermined maximum input value the at each time (T−t1), and a negative transition from the predetermined maximum input value to the predetermined minimum input value at each time (T−tj). The method further generates a minimum worst-case excitation input having a negative transition from the minimum input value to the maximum input value at each time (T−ti), and a positive transition from the maximum input value to the minimum input value at each time (T−tj).