Patents by Inventor Isaac Laurer

Isaac Laurer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8541295
    Abstract: A non-planar semiconductor device is provided including at least one semiconductor nanowire suspended above a semiconductor oxide layer present within a portion of a bulk semiconductor substrate. The semiconductor oxide layer has a topmost surface that is coplanar with a topmost surface of the bulk semiconductor substrate. A gate surrounds a portion of the at least one suspended semiconductor nanowire, a source region located on a first side of the gate, and a drain region located on a second side of the gate. The source region is in direct contact with an exposed end portion of the at least one suspended semiconductor nanowire, and the drain region is in direct contact with another exposed end portion of the at least one suspended semiconductor nanowire. The source and drain regions have an epitaxial relationship with the exposed end portions of the suspended semiconductor nanowire.
    Type: Grant
    Filed: February 5, 2013
    Date of Patent: September 24, 2013
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey W. Sleight, Josephine B. Chang, Isaac Laurer, Shreesh Narasimha