Patents by Inventor Isamu Seto
Isamu Seto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150044615Abstract: A method generates drawing data for performing drawing on a substrate with a plurality of charged particle beams based on pattern data representing a pattern to be drawn on the substrate. The method includes: a grouping step of grouping the plurality of charged particle beams into a plurality of groups based on a displacement amount of an irradiation position of each of the plurality of charged particle beams from target position thereof; and a generating step of generating the drawing data by changing the pattern data with respect to each of the plurality of groups based on the displacement amount of each of the plurality of charged particle beams.Type: ApplicationFiled: July 30, 2014Publication date: February 12, 2015Inventors: Kimitaka OZAWA, Isamu SETO
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Patent number: 8624205Abstract: A charged particle beam writing apparatus includes an aperture array configured to be capable of forming a plurality of charged particle beams using a plurality of openings, an element array including a plurality of main elements and a plurality of auxiliary elements different from the main elements, and a control unit configured to acquire information associated with a defect of the plurality of main elements and control the element array in accordance with the information, wherein the control unit controls the element array such that only the main elements are used when there is no defect, while when there is a main element having a defect, an auxiliary element is used without using the main element having the defect.Type: GrantFiled: January 6, 2010Date of Patent: January 7, 2014Assignee: Canon Kabushiki KaishaInventors: Isamu Seto, Yoshio Suzaki, Masamichi Kuwabara
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Publication number: 20100178602Abstract: A charged particle beam writing apparatus includes an aperture array configured to be capable of forming a plurality of charged particle beams using a plurality of openings, an element array including a plurality of main elements and a plurality of auxiliary elements different from the main elements, and a control unit configured to acquire information associated with a defect of the plurality of main elements and control the element array in accordance with the information, wherein the control unit controls the element array such that only the main elements are used when there is no defect, while when there is a main element having a defect, an auxiliary element is used without using the main element having the defect.Type: ApplicationFiled: January 6, 2010Publication date: July 15, 2010Applicant: CANON KABUSHIKI KAISHAInventors: Isamu Seto, Yoshio Suzaki, Masamichi Kuwabara
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Patent number: 6407397Abstract: Pattern data correction controllers 64i are provided one for each column, correction operation processing is performed on exposure data according to the characteristics of each corresponding column, the operation processing time corresponding to the exposure processing cycle required in the corresponding column is computed from data SD1, SCD1, WDM1, WDS1 indicating a per-shot exposure time, exposure time correction value, and settling waiting time generated based on the correction operation processing, a maximum value is detected from among the operation processing times computed by the respective pattern data correction controllers and, based on data PCD representing the operation processing time of the maximum value thus detected, an operation processing clock CK is generated and supplied to correction operation processing blocks 72 to 74 in the respective pattern data correction controllers.Type: GrantFiled: June 24, 1999Date of Patent: June 18, 2002Assignee: Advantest CorporationInventor: Isamu Seto
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Patent number: 6399954Abstract: Disclosed is a charged-particle beam lithography apparatus capable of readily detecting an abnormality in controlling the on-off operation of a charged-particle beam. The charged-particle beam lithography apparatus consists of a charged-particle beam generator, a charged-particle beam reshaping unit, a charged-particle beam converging unit, a charged-particle beam deflecting unit, a blanking unit, a digital converting circuit, and a comparing circuit. The blanking unit produces a blanking signal used to control the on-off operation of a charged-particle beam according to exposure pattern data, and thus controls the on-off operation of the charged-particle beam. The digital converting circuit produces a blanking data signal that is a digital signal indicating a variation of the blanking signal. The comparing circuit compares the blanking data signal with the exposure pattern data. It is detected whether the on-off operation of the charged-particle beam is controlled according to the exposure pattern data.Type: GrantFiled: February 2, 1999Date of Patent: June 4, 2002Assignee: Advantest CorporationInventors: Isamu Seto, Atsushi Saito, Hidefumi Yabara
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Publication number: 20010013581Abstract: A method of exposing a wafer to a charged-particle beam by directing to the wafer the charged-particle beam deflected by a deflector includes the steps of arranging a plurality of first marks at different heights, focusing the charged-particle beam on each of the first marks by using a focus coil provided above the deflector, obtaining a focus distance for each of the first marks, obtaining deflection-efficiency-correction coefficients for each of the first marks, and using linear functions of the focus distance for approximating the deflection-efficiency-correction coefficients to obtain the deflection-efficiency-correction coefficients for an arbitrary value of the focus distance. A device for carrying out the method is also set forth.Type: ApplicationFiled: April 6, 2001Publication date: August 16, 2001Inventors: Akio Takemoto, Yoshihisa Ooaeh, Tomohiko Abe, Hiroshi Yasuda, Takamasa Satoh, Hideki Nasuno, Hidefumi Yabara, Kenichi Kawakami, Kiichi Sakamoto, Tomohiro Sakazaki, Isamu Seto, Masami Takigawa, Tatsuro Ohkawa
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Patent number: 6242751Abstract: A method of exposing a wafer to a charged-particle beam by directing to the wafer the charged-particle beam deflected by a deflector includes the steps of arranging a plurality of first marks at different heights, focusing the charged-particle beam on each of the first marks by using a focus coil provided above the deflector, obtaining a focus distance for each of the first marks, obtaining deflection-efficiency-correction coefficients for each of the first marks, and using linear functions of the focus distance for approximating the deflection-efficiency-correction coefficients to obtain the deflection-efficiency-correction coefficients for an arbitrary value of the focus distance. A device for carrying out the method is also set forth.Type: GrantFiled: July 15, 1999Date of Patent: June 5, 2001Assignee: Fujitsu LimitedInventors: Akio Takemoto, Yoshihisa Ooaeh, Tomohiko Abe, Hiroshi Yasuda, Takamasa Satoh, Hideki Nasuno, Hidefumi Yabara, Kenichi Kawakami, Kiichi Sakamoto, Tomohiro Sakazaki, Isamu Seto, Masami Takigawa, Tatsuro Ohkawa
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Patent number: 5969365Abstract: A method of exposing a wafer to a charged-particle beam by directing to the wafer the charged-particle beam deflected by a deflector includes the steps of arranging a plurality of first marks at different heights, focusing the charged-particle beam on each of the first marks by using a focus coil provided above the deflector, obtaining a focus distance for each of the first marks, obtaining deflection-efficiency-correction coefficients for each of the first marks, and using linear functions of the focus distance for approximating the deflection-efficiency-correction coefficients to obtain the deflection-efficiency-correction coefficients for an arbitrary value of the focus distance. A device for carrying out the method is also set forth.Type: GrantFiled: August 26, 1997Date of Patent: October 19, 1999Assignee: Fujitsu LimitedInventors: Akio Takemoto, Yoshihisa Ooaeh, Tomohiko Abe, Hiroshi Yasuda, Takamasa Satoh, Hideki Nasuno, Hidefumi Yabara, Kenichi Kawakami, Kiichi Sakamoto, Tomohiro Sakazaki, Isamu Seto, Masami Takigawa, Tatsuro Ohkawa
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Patent number: 5965895Abstract: A method for providing charged particle beam exposure onto an object having a plurality of chip areas with a plurality of aligning marks formed in correspondence to each of said chip areas. A charged particle beam is irradiated upon an object mounted on a mobile step based upon positions of the aligning marks. Actual positions of the alignment marks are detected and compared to the design positions of the alignment marks to determine approximate relationships which are used to calculate an actual position to perform exposure.Type: GrantFiled: November 4, 1997Date of Patent: October 12, 1999Assignee: Fujitsu LimitedInventors: Takamasa Satoh, Hiroshi Yasuda, Junichi Kai, Yoshihisa Oae, Hisayasu Nishino, Kiichi Sakamoto, Hidefumi Yabara, Isamu Seto, Masami Takigawa, Akio Yamada, Soichiro Arai, Tomohiko Abe, Takashi Kiuchi, Kenichi Miyazawa
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Patent number: 5757015Abstract: A method of exposing a wafer to a charged-particle beam by directing to the wafer the charged-particle beam deflected by a deflector includes the steps of arranging a plurality of first marks at different heights, focusing the charged-particle beam on each of the first marks by using a focus coil provided above the deflector, obtaining a focus distance for each of the first marks, obtaining deflection-efficiency-correction coefficients for each of the first marks, and using linear functions of the focus distance for approximating the deflection-efficiency-correction coefficients to obtain the deflection-efficiency-correction coefficients for an arbitrary value of the focus distance. A device for carrying out the method is also set forth.Type: GrantFiled: April 18, 1996Date of Patent: May 26, 1998Assignee: Fujitsu LimitedInventors: Akio Takemoto, Yoshihisa Ooaeh, Tomohiko Abe, Hiroshi Yasuda, Takamasa Satoh, Hideki Nasuno, Hidefumi Yabara, Kenichi Kawakami, Kiichi Sakamoto, Tomohiro Sakazaki, Isamu Seto, Masami Takigawa, Tatsuro Ohkawa
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Patent number: 5721432Abstract: To improve in the throughput of an exposure system, the setting time during a step change in the output of an amplifier is reduced by switching resistance between the amplifier and deflector, a glitch waveform generated during a step change in the output of a D/A converter at the preceding stage of the amplifier, is anticipated and is canceled out with a correction waveform, after the output of the D/A converter has settled, this output is sample held and the step change is interpolated at a smoothing circuit, the deflection area is increased by positioning a electrostatic deflector offset around the optical axis relative to another electrostatic deflector, the response speed of the main deflection is improved by adding auxiliary deflection coils of one or two turn, and the alignment time is reduced by combining the coordinate conversion in the wafer area and in the chip area.Type: GrantFiled: June 20, 1996Date of Patent: February 24, 1998Assignee: Fujitsu LimitedInventors: Takamasa Satoh, Hiroshi Yasuda, Junichi Kai, Yoshihisa Oae, Hisayasu Nishino, Kiichi Sakamoto, Hidefumi Yabara, Isamu Seto, Masami Takigawa, Akio Yamada, Soichiro Arai, Tomohiko Abe, Takashi Kiuchi, Kenichi Miyazawa
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Patent number: 5719402Abstract: To improve the throughput of an exposure system, the setting time during a step change in the output of an amplifier is reduced by switching resistance between the amplifier and a deflector. A glitch waveform generated during a step change in the output of a D/A converter at the preceding stage of the amplifier is anticipated and is cancelled out with a correction waveform. After the output of the D/A converter has settled, this output is sample-held and the step change is interpolated with a smoothing circuit. The deflection area is increased by positioning an electrostatic deflector offset around the optical axis relative to another electrostatic deflector, and the response speed of the main deflection is improved by adding auxiliary deflection coils of one or two turns. The alignment time is reduced by combining the coordinate conversion in the wafer area and in the chip area.Type: GrantFiled: April 4, 1996Date of Patent: February 17, 1998Assignee: Fujitsu LimitedInventors: Takamasa Satoh, Hiroshi Yasuda, Junichi Kai, Yoshihisa Oae, Hisayasu Nishino, Kiichi Sakamoto, Hidefumi Yabara, Isamu Seto, Masami Takigawa, Akio Yamada, Soichiro Arai, Tomohiko Abe, Takashi Kiuchi, Kenichi Miyazawa
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Patent number: 5546319Abstract: To improve in the throughput of an exposure system, the setting time during a step change in the output of an amplifier is reduced by switching resistance between the amplifier and a deflector, a glitch waveform generated during a step change in the output or a D/A converter at the preceding stage of the amplifier, is anticipated and is canceled out with a correction waveform, after the output of the D/A converter has settled, this output is sample held and the step change is interpolated at a smoothing circuit, the deflection area is increased by positioning a electrostatic deflector offset around the optical axis relative to another electrostatic deflector, the response speed of the main deflection is improved by adding auxiliary deflection coils of one or two turn, and the alignment time is reduced by combining the coordinate conversion in the wafer area and in the chip area.Type: GrantFiled: January 27, 1995Date of Patent: August 13, 1996Assignee: Fujitsu LimitedInventors: Takamasa Satoh, Hiroshi Yasuda, Junichi Kai, Yoshihisa Oae, Hisayasu Nishino, Kiichi Sakamoto, Hidefumi Yabara, Isamu Seto, Masami Takigawa, Akio Yamada, Soichiro Arai, Tomohiko Abe, Takashi Kiuchi, Kenichi Miyazawa