Patents by Inventor Isao Kawamoto

Isao Kawamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10675560
    Abstract: A gas-liquid separator with enhanced performance and easy operation, capable of performing gas-liquid separation, such as advanced defoaming or degassing, and with a structural arrangement that facilitates easy CIP cleaning and disassembly cleaning, allowing to meet sanitary specifications. The gas-liquid separator for gas-liquid separation performed by centrifugal force includes an impeller, a suction inlet, a discharge outlet, an exhaust outlet, a separation impeller part, a discharge impeller part, and a vacuum device.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: June 9, 2020
    Assignee: KABUSHIKI KAISHA YOKOTA SEISAKUSHO
    Inventors: Isao Kawamoto, Shinji Kumanaka, Kenji Takahashi
  • Patent number: 10413853
    Abstract: The present invention provides a gas-liquid separator with enhanced performance and easy operation, capable of performing gas-liquid separation such as advanced defoaming or degassing, and with a structure that facilitates easy CIP cleaning and disassembly cleaning, allowing it to meet sanitary specifications.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: September 17, 2019
    Assignee: KABUSHIKI KAISHA YOKOTA SEISAKUSHO
    Inventors: Isao Kawamoto, Shinji Kumanaka, Kenji Takahashi
  • Publication number: 20180008910
    Abstract: The present invention provides a gas-liquid separator with enhanced performance and easy operation, capable of performing gas-liquid separation such as advanced defoaming or degassing, and with a structure that facilitates easy CIP cleaning and disassembly cleaning, allowing it to meet sanitary specifications.
    Type: Application
    Filed: January 22, 2016
    Publication date: January 11, 2018
    Applicant: Kabushiki Kaisha Yokota Seisakusho
    Inventors: Isao KAWAMOTO, Shinji KUMANAKA, Kenji TAKAHASHI
  • Publication number: 20170326488
    Abstract: The present invention provides a gas-liquid separator with enhanced performance and easy operation, capable of performing gas-liquid separation such as advanced defoaming or degassing, and with a structure that facilitates easy CIP cleaning and disassembly cleaning, allowing it to meet sanitary specifications.
    Type: Application
    Filed: November 30, 2015
    Publication date: November 16, 2017
    Applicant: KABUSHIKI KAISHA YOKOTA SEISAKUSHO
    Inventors: Isao KAWAMOTO, Shinji KUMANAKA, Kenji TAKAHASHI
  • Patent number: 9759217
    Abstract: A pump with high performance and cleanability includes a casing having a smaller volute and a larger volute; a space between an outer circumference of an impeller and a starting end of the smaller volute being greater than that of the larger volute, generating a circulating flow of self-priming water from the smaller volute to the larger volute; and a diffusing part of the larger volute being formed into an upright, cylindrical self-priming water separating chamber guiding the self-priming water from the smaller volute to flow in for air-water separation. An inner circumference part of the casing is formed concentric with the outer circumference of the impeller with a predetermined space therebetween; defining members are protrusively disposed on the inner circumference part of the casing so as to define the shapes of the two volutes; and the self-priming water separating chamber is made attachable to and detachable from the casing.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: September 12, 2017
    Assignee: KABUSHIKI KAISHA YOKOTA SEISAKUSHO
    Inventors: Hiroshi Yokota, Fumio Nishi, Isao Kawamoto, Kenji Takahashi
  • Patent number: 9700853
    Abstract: This invention provides a microscopic bubble generator that can stably/efficiently generate a large amount of microscopic bubbles in liquid in a short time and can be easily cleaned in an assembled state and in a disassembled state, and a gas-liquid dissolving tank that can be suitably used for the apparatus. In the gas-liquid dissolving tank that promotes dissolution of gas mixed with liquid in the liquid, openings that pass the flowing gas-liquid are formed at an upper portion and a lower portion of a container of the tank, a plurality of separation walls that vertically divide a plurality of chambers are disposed in the container, openings that connect upper and lower chambers are formed through the separation walls, the upper ends of the openings of the separation walls extend predetermined distances upward from the separation walls, and the lower ends of the openings of the separation walls extend predetermined distances downward from the separation walls.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: July 11, 2017
    Assignee: KABUSHIKI KAISHA YOKOTA SEISAKUSHO
    Inventors: Hiroshi Yokota, Fumio Nishi, Isao Kawamoto
  • Publication number: 20150352505
    Abstract: This invention provides a microscopic bubble generator that can stably/efficiently generate a large amount of microscopic bubbles in liquid in a short time and can be easily cleaned in an assembled state and in a disassembled state, and a gas-liquid dissolving tank that can be suitably used for the apparatus. In the gas-liquid dissolving tank that promotes dissolution of gas mixed with liquid in the liquid, openings that pass the flowing gas-liquid are formed at an upper portion and a lower portion of a container of the tank, a plurality of separation walls that vertically divide a plurality of chambers are disposed in the container, openings that connect upper and lower chambers are formed through the separation walls, the upper ends of the openings of the separation walls extend predetermined distances upward from the separation walls, and the lower ends of the openings of the separation walls extend predetermined distances downward from the separation walls.
    Type: Application
    Filed: January 28, 2014
    Publication date: December 10, 2015
    Inventors: Hiroshi YOKOTA, Fumio NISHI, Isao KAWAMOTO
  • Publication number: 20140169940
    Abstract: A pump with high performance and cleanability includes a casing having a smaller volute and a larger volute; a space between an outer circumference of an impeller and a starting end of the smaller volute being greater than that of the larger volute, generating a circulating flow of self-priming water from the smaller volute to the larger volute; and a diffusing part of the larger volute being formed into an upright, cylindrical self-priming water separating chamber guiding the self-priming water from the smaller volute to flow in for air-water separation. An inner circumference part of the casing is formed concentric with the outer circumference of the impeller with a predetermined space therebetween; defining members are protrusively disposed on the inner circumference part of the casing so as to define the shapes of the two volutes; and the self-priming water separating chamber is made attachable to and detachable from the casing.
    Type: Application
    Filed: August 9, 2012
    Publication date: June 19, 2014
    Applicant: KABUSHIKI KAISHA YOKOTA SEISAKUSHO
    Inventors: Hiroshi Yokota, Fumio Nishi, Isao Kawamoto, Kenji Takahashi
  • Patent number: 8239652
    Abstract: Before arbitration is performed in an arbitration section, an access from a master is kept in a waiting state until update of a conversion table buffer is performed, and an address conversion section is provided in a subsequent stage of the arbitration section. Without waiting for the completion of buffer update, an access is issued in advance at a time when it is assured that update is completed at the completion of address conversion. Thus, influences of waiting buffer update on another master can be eliminated and access latency can be reduced.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: August 7, 2012
    Assignee: Panasonic Corporation
    Inventors: Yuki Soga, Isao Kawamoto, Daisuke Murakami
  • Patent number: 8095744
    Abstract: The memory access device includes: a plurality of command division sections provided for a plurality of masters; a plurality of inter-master arbitration sections provided for a plurality of banks; and a memory control section. Each of the command division sections divides a command issued by the corresponding master into a plurality of micro-commands when the access region of the command is over two or more banks among the plurality of banks, each of the micro-commands being a command accessing only one of the two or more banks, and gives each of the micro-commands to an inter-master arbitration section corresponding to the bank including the access region of the micro-command. Each of the inter-master arbitration sections arbitrates micro-commands given from the command division sections to select one. The memory control section selects one of a plurality of micro-commands selected by the inter-master arbitration sections to perform memory access.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: January 10, 2012
    Assignee: Panasonic Corporation
    Inventors: Isao Kawamoto, Yoshiharu Watanabe
  • Publication number: 20110176372
    Abstract: The memory interface includes: a first data latch unit that delays a strobe signal from a memory device, through a first variable delay unit and reads the strobe signal as a first data signal; and a second data latch unit that delays the same strobe signal through the second variable delay unit and reads the strobe signal as a second data signal. The memory interface uses the data read by the first data latch unit in a normal memory access operation, detects a boundary of the delay amount by comparing the data with the data read by the second data latch unit, and reflects the boundary on the delay amount of the first variable delay unit. Thereby, the delay amount can be corrected without suspending the normal memory access operation.
    Type: Application
    Filed: March 31, 2011
    Publication date: July 21, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Takahide BABA, Isao KAWAMOTO, Daisuke MURAKAMI, Yuji TAKAI
  • Patent number: 7584464
    Abstract: In a multi-processor system constituted by a processor such as a CPU and a DSP, in which the processor and the DSP have an external memory and a bus as shared resources and the DSP carries out a process in response to a processing request from the processor, a monitoring step for status of use includes a step of monitoring the status of use of the DSP, and when contention information obtained in the monitoring step for the status of use indicates frequent uses, an altering step for software process appropriately alters a software processing method to be executed, and switches the corresponding process to an equivalent process so that it becomes possible to avoid bus contention, and consequently to prevent a reduction in the processing speed.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: September 1, 2009
    Assignee: Panasonic Corporation
    Inventors: Kei Yoneda, Isao Kawamoto, Seiji Kita, Takaaki Matsubayashi
  • Publication number: 20090204771
    Abstract: The memory access device includes: a plurality of command division sections provided for a plurality of masters; a plurality of inter-master arbitration sections provided for a plurality of banks; and a memory control section. Each of the command division sections divides a command issued by the corresponding master into a plurality of micro-commands when the access region of the command is over two or more banks among the plurality of banks, each of the micro-commands being a command accessing only one of the two or more banks, and gives each of the micro-commands to an inter-master arbitration section corresponding to the bank including the access region of the micro-command. Each of the inter-master arbitration sections arbitrates micro-commands given from the command division sections to select one. The memory control section selects one of a plurality of micro-commands selected by the inter-master arbitration sections to perform memory access.
    Type: Application
    Filed: November 7, 2008
    Publication date: August 13, 2009
    Inventors: Isao Kawamoto, Yoshiharu Watanabe
  • Patent number: 7533206
    Abstract: A bus arbitration section and a resource control section are interposed between a shared resource and a plurality of bus masters. The minimum number of receivable access permissions within a given period is set as bus arbitration information for each of the bus masters. If two or more of the bus masters issue access requests at the same time, the bus arbitration section preferentially gives access permission to a bus master which gained access permission a number of times less than a set value in the bus arbitration information within the given period, out of the two or more access bus masters.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: May 12, 2009
    Assignee: Panasonic Corporation
    Inventors: Daisuke Murakami, Yuji Takai, Isao Kawamoto
  • Publication number: 20090031101
    Abstract: Before arbitration is performed in an arbitration section, an access from a master is kept in a waiting state until update of a conversion table buffer is performed, and an address conversion section is provided in a subsequent stage of the arbitration section. Without waiting for the completion of buffer update, an access is issued in advance at a time when it is assured that update is completed at the completion of address conversion. Thus, influences of waiting buffer update on another master can be eliminated and access latency can be reduced.
    Type: Application
    Filed: April 25, 2008
    Publication date: January 29, 2009
    Inventors: Yuki Soga, Isao Kawamoto, Daisuke Murakami
  • Patent number: 7472213
    Abstract: Bandwidth information including a plurality of slots each having highest priority order information for arbitrating access conflict, and priority master information for specifying, as a priority master, one or more of a plurality of masters whose latency in accessing a memory serving as a shared resource is desired to be reduced are included as arbitration information. When an arbitration section arbitrates access conflict while switching the slots in the bandwidth information at each of predetermined arbitration timings, if there is an access request from the priority master specified in the priority master information, the arbitration section changes the sequence of the slots in the bandwidth information so as to allow the priority master to access the memory with priority.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: December 30, 2008
    Assignee: Panasonic Corporation
    Inventors: Toshihiro Fukuyama, Yuji Takai, Isao Kawamoto, Takahide Baba, Daisuke Murakami, Yoshiharu Watanabe
  • Patent number: 7350004
    Abstract: Bandwidth information including a plurality of slots each having highest priority order information for arbitrating access conflict, and priority master information for specifying, as a priority master, one or more of a plurality of masters whose latency in accessing a memory serving as a shared resource is desired to be reduced are included as arbitration information. When an arbitration section arbitrates access conflict while switching the slots in the bandwidth information at each of predetermined arbitration timings, if there is an access request from the priority master specified in the priority master information, the arbitration section changes the sequence of the slots in the bandwidth information so as to allow the priority master to access the memory with priority.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: March 25, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshihiro Fukuyama, Yuji Takai, Isao Kawamoto, Takahide Baba, Daisuke Murakami, Yoshiharu Watanabe
  • Publication number: 20080065801
    Abstract: Bandwidth information including a plurality of slots each having highest priority order information for arbitrating access conflict, and priority master information for specifying, as a priority master, one or more of a plurality of masters whose latency in accessing a memory serving as a shared resource is desired to be reduced are included as arbitration information. When an arbitration section arbitrates access conflict while switching the slots in the bandwidth information at each of predetermined arbitration timings, if there is an access request from the priority master specified in the priority master information, the arbitration section changes the sequence of the slots in the bandwidth information so as to allow the priority master to access the memory with priority.
    Type: Application
    Filed: October 31, 2007
    Publication date: March 13, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshihiro Fukuyama, Yuji Takai, Isao Kawamoto, Takahide Baba, Daisuke Murakami, Yoshiharu Watanabe
  • Publication number: 20060155904
    Abstract: A bus arbitration section and a resource control section are interposed between a shared resource and a plurality of bus masters. The minimum number of receivable access permissions within a given period is set as bus arbitration information for each of the bus masters. If two or more of the bus masters issue access requests at the same time, the bus arbitration section preferentially gives access permission to a bus master which gained access permission a number of times less than a set value in the bus arbitration information within the given period, out of the two or more access bus masters.
    Type: Application
    Filed: January 10, 2006
    Publication date: July 13, 2006
    Inventors: Daisuke Murakami, Yuji Takai, Isao Kawamoto
  • Patent number: 7041660
    Abstract: This invention provides crystalline forms of a 1-methylcarbapenem derivative of formula (I-1), (I-2) or (I-3) The crystalline forms of the 1-methylcarbapenem derivative exhibit excellent antibiotic activity against various bacterial strains and sufficient stability for practical use.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: May 9, 2006
    Assignee: Sankyo Company, Limited
    Inventors: Isao Kawamoto, Yasuo Shimoj, Hiroshi Fukuhara