Abstract: In a calculation processing device for calculating inputted data to output the result of the calculation, a number-of-calculation generator generates the numbers of parallel and serial calculations based on the data length of the received data. When a calculation enable generator applies a parallel enabling signal or a serial enabling signal to an input controller in order to control the numbers of these calculations, the received data is inputted to a calculation processor in parallel during an input period of the parallel enabling signal, and is inputted to the calculation processor in serial during an input period of the serial enabling signal. The calculation processor performs parallel and serial processes for the inputted data to output the results of the processes on an output.

Abstract: A memory control unit includes fuses that are selectively blown to set a manufacturer's identification code (ID), and a further fuse that is selectively blown to designate the memory control unit as a general-purpose unit or a custom unit. When designated as a custom unit, the memory control unit uses the manufacturer's ID to protect data in the memory by scrambling the data, or by comparing the manufacturer's ID with an input ID and disabling access to the memory if the ID's do not match. A semiconductor integrated circuit chip including the memory control unit can thus be fuse-programmed for either general-purpose use or custom use.

Abstract: A memory control unit includes fuses that are selectively blown to set a manufacturer's identification code (ID), and a further fuse that is selectively blown to designate the memory control unit as a general-purpose unit or a custom unit. When designated as a custom unit, the memory control unit uses the manufacturer's ID to protect data in the memory by scrambling the data, or by comparing the manufacturer's ID with an input ID and disabling access to the memory if the ID's do not match. A semiconductor integrated circuit chip including the memory control unit can thus be fuse-programmed for either general-purpose use or custom use.

Abstract: An error correction circuit employing the cyclic code quickly corrects a single error contained in a received codeword. A serial-to-parallel converter converts the received codeword from serial data to parallel data. A CRC calculator divides the received codeword by a generator polynomial to output the remainder to logical gates. The logical gates determine to which of the remainder patterns, previously calculated for each location of the received codeword containing a single error, in which a single error is located, correspond to the remainder patterns output from the CRC calculator, and detects a location containing the single error. The logical gates set detection signals corresponding to the single error location to 1. An exclusive OR gate executes an exclusive OR operation on the received codeword output from the serial-to-parallel converter and the detection signal output from the logical circuits, on the bit basis, to correct the single error contained in the received codeword.

Abstract: A method of controlling a rotary cutter in which material of long size such as steel plate or corrugated cardboard moving between a pair of rotating shears each having a shearing edge on its peripheral surface is cut in a predetermined cut length by controlling a motor for driving the shears, wherein the provision of steps of calculating an optimum shear position with minimum energy on the basis of moving quantity of the material, calculating minimum optimum shear velocity and optimum motor current on the basis of the moving quantity of the material and moving velocity of the material, and rotating the shears so that the calculated condition is realized. The shear position and the shear velocity of the rotary cutter and the drive motor current are selected to the optimum condition with minimum energy and operation can be made under the condition of minimum energy.