Patents by Inventor Itai Bransky

Itai Bransky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7283882
    Abstract: Automated comparison of tool recipes is described. A target recipe is digitally translated from a tool language to a standard language format to produce a translated recipe. The translated recipe is digitally compared to a source recipe that is also in the standard language format.
    Type: Grant
    Filed: February 15, 2006
    Date of Patent: October 16, 2007
    Assignee: KLA-Tencor Technologies Corporation
    Inventors: Itai Bransky, Shachor Omer, Arkady Simkin, Igor Baskin
  • Patent number: 6362096
    Abstract: A method and apparatus for selectively depositing hemispherical grained silicon on the surface of a wafer in a process chamber. The chamber is evacuated so that a partial pressure of water vapor in the chamber is less than 10−7 torr, preferably using a turbomolecular pump and a water vapor pump in cooperation. A process gas mixture including silicon is introduced into the chamber. The surface of the wafer is seeded with silicon nuclei, and the wafer is annealed to convert the silicon to HSG.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: March 26, 2002
    Assignee: Streag CVD Systems LTD
    Inventors: Arie Harnik, Michael Sandler, Itai Bransky
  • Patent number: 6204120
    Abstract: Systems and methods are described for semiconductor wafer pretreatment. A method of treating a semiconductor wafer, includes contacting the semiconductor wafer with a mixture including HF and CH3OH; and then contacting the semiconductor wafer with Cl2 and simultaneously exposing said semiconductor wafer to a source of ultraviolet energy. The selective HSG temperature of formation window is widened. In addition, robustness with regard to changes in the reactor ambient and substrate condition, and selectivity with regard to underlying dielectric layers, are both improved.
    Type: Grant
    Filed: September 28, 1998
    Date of Patent: March 20, 2001
    Assignee: AG Associates (Israel) Ltd.
    Inventors: Yitzhak Eric Gilboa, Benjamin Brosilow, Sagy Levy, Hedvi Spielberg, Itai Bransky
  • Patent number: 6191011
    Abstract: Systems and methods are described for semiconductor wafer pretreatment. A method of increasing the selectivity of silicon deposition with regard to an underlying oxide layer during deposition of a silicon containing material by broadening a selective temperature of formation window for said silicon containing material by decreasing a lower temperature endpoint includes: providing a semiconductor wafer with the underlying oxide layer in a processing chamber; then pumping water from then processing chamber; and then depositing the silicon containing material on the semiconductor wafer. A step of seeding the semiconductor wafer can be conducted by exposing the semiconducotor wafer to a germanium containing gas. A chlorine containing precursor and/or hydrogen can be introduced into the processing chamber to increase the selectivity of the silicon containing material to the underlying oxide. The selective HSG temperature of formation window is widened.
    Type: Grant
    Filed: September 28, 1998
    Date of Patent: February 20, 2001
    Assignee: AG Associates (Israel) Ltd.
    Inventors: Yitzhak Eric Gilboa, Benjamin Brosilow, Sagy Levy, Hedvi Spielberg, Itai Bransky