Abstract: A system and apparatus for secure NVM format by pre-erase is disclosed. According to certain embodiments when an NVM does into idle mode, one or more free blocks are serially popped from a free block heap. The free block is then physically erased in an SLC mode, and then pushed to a pre-erase heap. The process is performed in both SLC and TLC partitions, in the TLC partition the block becomes hybrid SLC (HSLC). This process increases a program erase count (PEC) value of the block, maintaining device longevity. When there is a need to use a new block, it is popped from the pre-erase heap. In some cases where there is a need to use a TLC block instead of an HSLC block, an erase operation is used that converts the block from HSLC to TLC, and does not increase a PEC value for the block.

Abstract: A data storage device includes a memory device, a random access memory (RAM) device, and a controller coupled to the memory device and the RAM device. The controller is configured to determine a workload type of the data storage device, determine to store at least a portion of a compressed logical to physical translation table (ZCAT) in the RAM device based on the workload type, and utilize a remaining portion of the RAM device to perform background operations. The controller is further configured to determine a persistence or temperature of the ZCAT, where the portion of the ZCAT stored to the RAM device is based on the persistence and/or the temperature of the ZCAT. The remaining portion of the ZCAT is stored in the HMB, where the remaining portion may update any out-of-date ZCAT entries.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to determine that a power loss event has occurred, determine that one or more blocks are in an erased state, examine a block of the one or more blocks to determine whether the block is a SLC erased block or a TLC erased block, and place the block in a SLC pre-erase heap if the block is the SLC erased block or in a TLC pre-erase heap if the block is the TLC erased block. The controller is further configured to determine a first bit count of page0 for a SLC voltage for the block, determine a second bit count of page1 for a TLC voltage for the block, and classify the block as either a SLC erased block or a TLC erased block.

Abstract: A system and apparatus for secure NVM format by pre-erase is disclosed. According to certain embodiments when an NVM does into idle mode, one or more free blocks are serially popped from a free block heap. The free block is then physically erased in an SLC mode, and then pushed to a pre-erase heap. The process is performed in both SLC and TLC partitions, in the TLC partition the block becomes hybrid SLC (HSLC). This process increases a program erase count (PEC) value of the block, maintaining device longevity. When there is a need to use a new block, it is popped from the pre-erase heap. In some cases where there is a need to use a TLC block instead of an HSLC block, an erase operation is used that converts the block from HSLC to TLC, and does not increase a PEC value for the block.