Abstract: The embodiments herein relate to methods and apparatus for performing ion etching on a semiconductor substrate, as well as methods for forming such apparatus. In some embodiments, an electrode assembly may be fabricated, the electrode assembly including a plurality of electrodes having different purposes, with each electrode secured to the next in a mechanically stable manner. Apertures may be formed in each electrode after the electrodes are secured together, thereby ensuring that the apertures are well-aligned between neighboring electrodes. In some cases, the electrodes are made from degeneratively doped silicon, and the electrode assembly is secured together through electrostatic bonding. Other electrode materials and methods of securing may also be used. The electrode assembly may include a hollow cathode emitter electrode in some cases, which may have a frustoconical or other non-cylindrical aperture shape. A chamber liner and/or reflector may also be present in some cases.

Abstract: Methods for controlled isotropic etching of layers of silicon oxide and germanium oxide with atomic scale fidelity are provided. The methods make use of NO activation of an oxide surface. Once activated, a fluorine-containing gas or vapor etches the activated surface. Etching is self-limiting as once the activated surface is removed, etching stops since the fluorine species does not spontaneously react with the un-activated oxide surface. These methods may be used in interconnect pre-clean applications, gate dielectric processing, manufacturing of memory devices, or any other applications where accurate removal of one or multiple atomic layers of material is desired.

Abstract: Methods for controlled isotropic etching of layers of silicon oxide and germanium oxide with atomic scale fidelity are provided. The methods make use of a reaction of anhydrous HF with an activated surface of an oxide, with an emphasis on removal of water generated in the reaction. In certain embodiments the oxide surface is first modified by adsorbing an OH-containing species (e.g., an alcohol) or by forming OH bonds using a hydrogen-containing plasma. The activated oxide is then etched by a separately introduced anhydrous HF, while the water generated in the reaction is removed from the surface of the substrate as the reaction proceeds, or at any time during or after the reaction. These methods may be used in interconnect pre-clean applications, gate dielectric processing, manufacturing of memory devices, or any other applications where accurate removal of one or multiple atomic layers of material is desired.

Abstract: Methods of selectively etching silicon nitride are provided. Silicon nitride layers are exposed to a fluorinating gas and nitric oxide (NO), which may be formed by reacting nitrous oxide (N2O) and oxygen (O2) in a plasma. Methods also include defluorinating the substrate prior to turning off the plasma to increase etch selectivity of silicon nitride.

Abstract: Various embodiments herein relate to methods and apparatus for performing anisotropic ion beam etching to form arrays of channels. The channels may be formed in semiconductor material, and may be used in a gate-all-around device. Generally speaking, a patterned mask layer is provided over a layer of semiconductor material. Ions are directed toward the substrate while the substrate is positioned in two particular orientations with respect to the ion trajectory. The substrate switches between these orientations such that ions impinge upon the substrate from two opposite angles. The patterned mask layer shadows/protects the underlying semiconductor material such that the channels are formed in intersecting shadowed regions.

Abstract: A device for processing wafer-shaped articles comprises a closed process chamber that provides a gas-tight enclosure. A rotary chuck is located within the closed process chamber. A heater is positioned relative to the chuck so as to heat a wafer shaped article held on the chuck from one side only and without contacting the wafer shaped article. The heater emits radiation having a maximum intensity in a wavelength range from 390 nm to 550 nm. At least one first liquid dispenser is positioned relative to the chuck so as to dispense a process liquid onto a side of a wafer shaped article that is opposite the side of the wafer-shaped article facing the heater.

Abstract: Various embodiments herein relate to methods and apparatus for etching feature on a substrate. In a number of embodiments, no substrate rotation or tilting is used. While conventional etching processes rely on substrate rotation to even out the distribution of ions over the substrate surface, various embodiments herein achieve this purpose by moving the ion beams relative to the ion source. Movement of the ion beams can be achieved in a number of ways including electrostatic techniques, mechanical techniques, magnetic techniques, and combinations thereof.

Abstract: The embodiments herein relate to methods and apparatus for performing ion etching on a semiconductor substrate, as well as methods for forming such apparatus. In some embodiments, an electrode assembly may be fabricated, the electrode assembly including a plurality of electrodes having different purposes, with each electrode secured to the next in a mechanically stable manner. Apertures may be formed in each electrode after the electrodes are secured together, thereby ensuring that the apertures are well-aligned between neighboring electrodes. In some cases, the electrodes are made from degeneratively doped silicon, and the electrode assembly is secured together through electrostatic bonding. Other electrode materials and methods of securing may also be used. The electrode assembly may include a hollow cathode emitter electrode in some cases, which may have a frustoconical or other non-cylindrical aperture shape. A chamber liner and/or reflector may also be present in some cases.

Abstract: One process that may be used to remove material from a surface is ion etching. In certain cases, ion etching involves delivery of both ions and a reactive gas to a substrate. The disclosed embodiments permit local high pressure delivery of reactive gas to a substrate while maintaining a much lower pressure on portions of the substrate that are outside of the local high pressure delivery area. The low pressure is achieved by confining the high pressure reactant delivery to a small area and vacuuming away excess reactants and byproducts as they leave this small area and before they enter the larger substrate processing region. The disclosed techniques may be used to increase throughput while minimizing deleterious collisions between ions and other species present in the substrate processing region.

Abstract: Systems and methods for processing a substrate include exposing a substrate to UV light from a UV light source having a predetermined wavelength range. The substrate includes a photoresist layer that has been bombarded with ions. The method includes controlling a temperature of the substrate, while exposing the substrate to the UV light, to a temperature less than or equal to a first temperature. The method includes removing the photoresist layer using plasma while maintaining a temperature of the substrate to less than or equal to a strip process temperature after exposing the substrate to the UV light.

Abstract: A system and methods are provided for mitigating or removing workpiece surface contaminants or conditions. Methods of the invention provide treatment of the wafer surface to provide a known surface condition. The surface condition can then be maintained during and following implantation of the workpiece surface with a dopant.

Abstract: A system and methods are provided for mitigating or removing workpiece surface contaminants or conditions. Methods of the invention provide treatment of the wafer surface to provide a known surface condition. The surface condition can then be maintained during and following implantation of the workpiece surface with a dopant.

Abstract: An ion implantation system utilizing detected ion induced luminescence as feedback control that comprises, a wafer, a spectrometer, a photodetector, an ion source generator, wherein the ion source generator is configured to implant the wafer with ions, and the photodetector is configured to detect ion induced luminescence both on and off the wafer.

Abstract: Low dielectric constant porous materials with improved elastic modulus and material hardness. The process of making such porous materials involves providing a porous dielectric material and plasma curing the porous dielectric material with a fluorine-free plasma gas to produce a fluorine-free plasma cured porous dielectric material. Fluorine-free plasma curing of the porous dielectric material yields a material with improved modulus and material hardness, and with comparable dielectric constant. The improvement in elastic modulus is typically greater than or about 50%, and more typically greater than or about 100%. The improvement in material hardness is typically greater than or about 50%. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.

Abstract: Low dielectric constant porous materials with improved elastic modulus and hardness. The process of making such porous materials involves providing a porous dielectric material and plasma curing the porous dielectric material to produce a plasma cured porous dielectric material. Plasma curing of the porous dielectric material yields a material with improved modulus and hardness. The improvement in elastic modulus is typically greater than or about 50%, more typically greater than or about 100%, and more typically greater than or about 200%. The improvement in hardness is typically greater than or about 50%. The plasma cured porous dielectric material can optionally be post-plasma treated. The post-plasma treatment of the plasma cured porous dielectric material reduces the dielectric constant of the material while maintaining an improved elastic modulus and hardness as compared to the plasma cured porous dielectric material.

Abstract: Low dielectric constant film materials with improved elastic modulus. The method of making such film materials involves providing a porous methyl silsesquioxane based dielectric film material produced from a resin molecule containing at least 2 Si—CH3 groups and plasma curing the porous film material to convert the film into porous silica. Plasma curing of the porous film material yields a film with improved modulus and outgassing properties. The improvement in elastic modulus is typically greater than or about 100%, and more typically greater than or about 200%. The plasma cured porous film material can optionally be annealed. The annealing of the plasma cured film may reduce the dielectric constant of the film while maintaining an improved elastic modulus as compared to the plasma cured porous film material. The annealed, plasma cured film has a dielectric constant between about 1.1 and about 2.4 and an improved elastic modulus.

Abstract: Low dielectric constant materials with improved elastic modulus and material hardness. The process of making such materials involves providing a dielectric material and ultraviolet (UV) curing the material to produce a UV cured dielectric material. UV curing yields a material with improved modulus and material hardness. The improvement is each typically greater than or about 50%. The UV cured dielectric material can optionally be post-UV treated. The post-UV treatment reduces the dielectric constant of the material while maintaining an improved elastic modulus and material hardness as compared to the UV cured dielectric material. UV cured dielectrics can additionally exhibit a lower total thermal budget for curing than for furnace curing processes.

Abstract: Low dielectric constant films with improved elastic modulus. The method of making such coatings involves providing a porous network coating produced from a resin containing at least 2 Si—H groups and plasma curing the coating to convert the coating into porous silica. Plasma curing of the network coating yields a coating with improved modulus, but with a higher dielectric constant. The costing is plasma cured for between about 15 and about 120 seconds at a temperature less than or about 350° C. The plasma cured coating can optionally be annealed. Rapid thermal processing (RTP) of the plasma cured coating reduces the dielectric constant of the coating while maintaining an improved elastic modulus as compared to the plasma cured porous network coating. The annealing temperature is typically loss than or about 475° C., and the annealing time is typically no more than or about 180 seconds. The annealed, plasma cured coating has a dielectric constant in the range of from about 1.1 to about 2.

Abstract: In one aspect, the invention encompasses a method of manufacturing a stencil mask comprising: a) defining a plurality of opening locations within a substrate; b) providing a dopant within the substrate, the dopant being provided in a pattern to form a plurality of first regions doped to a concentration with a dopant and one or more second regions not doped to the concentration with the dopant, individual first regions surrounding individual opening locations; c) forming a plurality of openings within the opening locations, the individual openings extending into the substrate; and d) forming a stencil mask from the substrate having the openings extending therein.