Patents by Inventor Ivelina Hristova

Ivelina Hristova has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Depth map sensor with bin rotation
    Patent number: 11892568
    Abstract: A depth map sensor includes a first array of first pixels, each first pixel having a first photodetector associated with a pixel circuit that comprises a plurality of first bins for accumulating events. A clock source is configured to generate a plurality of phase-shifted clock signals. A first circuit has a plurality of first output lines coupled to the first array of first pixels. The first circuit is configured to receive the plurality of phase-shifted clock signals. The first circuit includes a first block and a second block. The first block is configured to propagate the plurality of phase-shifted clock signals to the second block during a first period determined by a first enable signal and the second block configured to select to which of the plurality of first output lines each of the plurality of phase-shifted clock signals is applied.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: February 6, 2024
    Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventors: Ivelina Hristova, Pascal Mellot, Neale Dutton
  • DEPTH MAP SENSOR WITH BIN ROTATION
    Publication number: 20210133992
    Abstract: A depth map sensor includes a first array of first pixels, each first pixel having a first photodetector associated with a pixel circuit that comprises a plurality of first bins for accumulating events. A clock source is configured to generate a plurality of phase-shifted clock signals. A first circuit has a plurality of first output lines coupled to the first array of first pixels. The first circuit is configured to receive the plurality of phase-shifted clock signals. The first circuit includes a first block and a second block. The first block is configured to propagate the plurality of phase-shifted clock signals to the second block during a first period determined by a first enable signal and the second block configured to select to which of the plurality of first output lines each of the plurality of phase-shifted clock signals is applied.
    Type: Application
    Filed: October 19, 2020
    Publication date: May 6, 2021
    Inventors: Ivelina Hristova, Pascal Mellot, Neale Dutton