Abstract: One or more semiconductor processing tools may deposit a contact etch stop layer on a substrate. In some implementations, the contact etch stop layer is comprised of less than approximately 12 percent hydrogen. Depositing the contact etch stop layer may include depositing contact etch stop layer material at a temperature of greater than approximately 600 degrees Celsius, at a pressure of greater than approximately 150 torr, and/or with a ratio of at least approximately 70:1 of NH3 and SiH4, among other examples. The one or more semiconductor processing tools may deposit a silicon-based layer above the contact etch stop layer. The one or more semiconductor processing tools may perform an etching operation into the silicon-based layer until reaching the contact etch stop layer to form a trench isolation structure.

Abstract: A pulsewidth modulation circuit uses a plurality of programmable paths to connect its output line to ground connections. The paths have different numbers of serially-connected NFETs to provide different pulldown rates. A desired programmable paths is selected based on encoded control signals, with decode logic integrated into the programmable paths. The decode logic includes, for each path, at least two transistors controlled by one of the encoded signals or their complements. A default path to ground may also be provided for use when none of the programmable paths is selected. For example, two encoded signals may be used to select 1-in-4 among the default path and three programmable paths. Integration of the decode logic into the programmable paths results in smaller overall circuit area, leading to reduced power usage, while still retaining the orthogonal benefit of encoded control signals.

Abstract: A pulsewidth modulation circuit uses a plurality of programmable paths to connect its output line to ground connections. The paths have different numbers of serially-connected NFETs to provide different pulldown rates. A desired programmable paths is selected based on encoded control signals, with decode logic integrated into the programmable paths. The decode logic includes, for each path, at least two transistors controlled by one of the encoded signals or their complements. A default path to ground may also be provided for use when none of the programmable paths is selected. For example, two encoded signals may be used to select 1-in-4 among the default path and three programmable paths. Integration of the decode logic into the programmable paths results in smaller overall circuit area, leading to reduced power usage, while still retaining the orthogonal benefit of encoded control signals.

Abstract: An ellipsometer for measuring the complex refractive index of a sample and thin film thickness according to the invention. The ellipsometer includes a linear polarized light source, a reference analyzer, a polarization analyzer and a light direction controller. The linear polarized light source used to generate a measuring beam for detecting the sample. The phase modulator used to control the phase of the measuring beam thereby to generate a sampling beam. The reference analyzer used to generate a reference beam according to part of the sampling beam thereby to adjust the intensity of the sampling beam. The polarization analyzer used to analyze the phase, polarization and intensity of the sampling beam after the sampling beam is reflected by the sample.

Abstract: A method for making a semiconductor package firstly provides a lead frame having a first surface and a corresponding second surface. The lead frame includes at least a package unit that further includes a die pad, and a plurality of leads disposed on the periphery of the die pad where each of the leads further includes a neck portion. The method then attaches the second surface of the lead frame to a tape, and performs a punching process to cut off the neck portion of the lead so as to form a plurality of conductive blocks disposed independently on the periphery of the die pad. The method further provides a chip having its back surface attach to the first surface of the die pad, and provides electrical connection between the bonding pad and the first surface of the conductive block by using a plurality of bonding wires. Further, the method performs an encapsulating process to encapsulate the chip, the bonding wires, the die pad, and the first surface of the conductive block.

Abstract: An optical path overlapping type incident angle changeable optical mechanism according to the invention allows an incident light beam to be incident onto a measured range of a sample within a large incident angle range. The optical mechanism includes a reflecting prism reflecting the incident light beam to generate a reflected light beam having an angle of 90° with respect to the incident light beam; a concave parabolic cylindric mirror guiding the reflected light beam coming from the reflecting prism to a measured range of a detect-waiting sample to thereby be further reflected to generate a detect-waiting light beam; a concave cylindric mirror used to make the detect-waiting light beam incident onto/reflected by the reflecting prism so as to overlap with the incident light beam; and a light beam splitting means used to separate the detect-waiting light beam from the incident light beam.

Abstract: A method is described for forming a dynamic random access memory cell capacitor in which a polysilicon spacer is formed on top of the bottom polysilicon electrode to construct a tub shape and a wet dip is used to remove silicon oxide from cavities under the bottom polysilicon electrode, increasing the overlap with the top polysilicon electrode and thus increasing the surface area of the capacitor without increasing the area on the substrate occupied by the capacitor.

Abstract: A method is described for forming a dynamic random access memory cell capacitor in which a polysilicon spacer is formed on top of the bottom polysilicon electrode to construct a tub shape and a wet dip is used to remove silicon oxide from cavities under the bottom polysilicon electrode, increasing the overlap with the top polysilicon electrode and thus increasing the surface area of the capacitor without increasing the area on the substrate occupied by the capacitor.