Patents by Inventor J. Orion Pritchard

J. Orion Pritchard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Allocating hardware resources for high-level language code sequences
    Patent number: 7533362
    Abstract: Methods and apparatus are provided for implementing a programmable chip using a high-level language. Code sequences or subroutines provided in a high-level language are overloaded with information to specify the number of hardware resources such as logic elements or functional blocks used to implement the code on a programmable chip. Code sequences remain compliant with standard high-level language compilers while also being able to provide resource count information to high-level language to hardware compilers.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: May 12, 2009
    Assignee: Altera Corporation
    Inventor: J. Orion Pritchard
  • Scheduling logic on a programmable device implemented using a high-level language
    Patent number: 7409670
    Abstract: Methods and apparatus are provided for implementing a programmable device including a processor core, a hardware accelerator, and secondary components such as memory. A portion of a program written in a high-level language is automatically selected for hardware acceleration. Dedicated ports are generated to allow the hardware accelerator to handle pointer referencing and dereferencing. A hardware accelerator is generated to perform pipelined processing of instructions. The number of stages implemented for pipelined processing is at least partially dependent on the latency associated with accessing secondary components.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: August 5, 2008
    Assignee: Altera Corporation
    Inventors: J. Orion Pritchard, Todd Wayne
  • Methods and apparatus for variable latency support
    Patent number: 7353484
    Abstract: Methods and apparatus are provided for interconnecting primary components with secondary components on a programmable chip. Control, data, and address lines are automatically generated to connect primary components and secondary components with an interconnection module. The interconnection connection module manages interaction between primary components and secondary components and provides support for fixed latency and variable latency secondary components.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: April 1, 2008
    Assignee: Altera Corporation
    Inventors: J. Orion Pritchard, Todd Wayne
  • Methods and apparatus for tristate line sharing
    Patent number: 7149827
    Abstract: Methods and apparatus are provided for interconnecting on-chip components, such as components on a programmable chip, with off-chip components through a variety of buses, fabrics, and input/output lines. Interconnection resources such as input/output lines are shared for communication with different off-chip components such as memory. Control circuitry and an arbitration fabric are provided to further improve communication efficiency between on-chip and off-chip components.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: December 12, 2006
    Assignee: Altera Corporation
    Inventors: J. Orion Pritchard, Todd Wayne
  • Driven capacitor storage pixel sensor and array
    Patent number: 6636261
    Abstract: A storage pixel sensor comprises a photosensor selectively connectable to a reset potential; a switched buffer amplifier having a control terminal coupled to said photosensor, a first terminal connected to a source of a transfer signal, and a second terminal; a storage capacitor coupled to said second terminal of said switched buffer amplifier; and an amplifier coupled to said storage capacitor.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: October 21, 2003
    Assignee: Foveon, Inc.
    Inventors: J. Orion Pritchard, Richard B. Merrill, Richard F. Lyon
  • Driven capacitor storage pixel sensor and array
    Patent number: 6054704
    Abstract: A storage pixel sensor comprises a photosensor selectively connectable to a reset potential; a switched buffer amplifier having a control terminal coupled to said photosensor, a first terminal connected to a source of a transfer signal, and a second terminal; a storage capacitor coupled to said second terminal of said switched buffer amplifier; and an amplifier coupled to said storage capacitor.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: April 25, 2000
    Assignee: Foveon, Inc.
    Inventors: J. Orion Pritchard, Richard B. Merrill, Richard F. Lyon