Patents by Inventor Jørn Nystad

Jørn Nystad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9406155
    Abstract: A graphics processor 1 includes after its tile rendering logic 40, a transaction elimination unit 5 that includes data block generation logic 41 and block comparison logic 43. The block generation logic 41 generates data blocks from the rendered tiles produced by the tile rendering logic 40. The data blocks are then stored in buffers 42. Comparison logic 43 then compares a new data block with the previous data block (which will already be stored in the buffers 42), and generates an output metadata bit indicating whether the blocks can be considered to be the same or not, on the basis of the comparison. The meta-data output bits are stored appropriately in a meta-data bitmap 45 in main memory 2 that is associated with the output data array in question. If the blocks are determined to be different by the comparison logic then the new data block is written from the buffers 42 to the frame buffer 44 in the main memory 2.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: August 2, 2016
    Assignee: ARM Limited
    Inventors: Jon Erik Oterhals, Daren Croxford, Lars Ericsson, Jørn Nystad, Eivind Liland
  • Publication number: 20160179676
    Abstract: A data processing system incorporates a write-back cache and supports load-and-clean program instructions. The action of a load-and-clean program instruction is to load a data value and to mark as clean at least a target portion within a cache line of the write-back cache which is storing the data value loaded. The data values to be subject to such load-and-clean instructions may be identified by the programmer as the last use of those data values, or may be identified by a compiler as the last use of those data values. The data values may be from a stack memory region in which their pattern of access is predictable and it is known when they are no longer required. Another example of regular memory accesses where the last access can be identified is when processing streaming media data.
    Type: Application
    Filed: December 2, 2015
    Publication date: June 23, 2016
    Inventors: Andreas Due ENGH-HALSTVEDT, Jørn NYSTAD
  • Patent number: 9367953
    Abstract: When rendering a scene that includes a complex object made up of many individual primitives, rather than processing each primitive making up the object in turn, a bounding volume which surrounds the complex object is generated and the scene is then processed using the bounding volume in place of the actual primitives making up the complex object. If it is determined that the bounding volume representation of the object will be completely occluded in the scene (e.g. by a foreground object), then the individual primitives making up the complex object are not processed. This can save significantly on processing time and resources for the scene.
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: June 14, 2016
    Assignee: ARM Limited
    Inventors: Jørn Nystad, Borgar Ljosland, Edvard Sørgård
  • Publication number: 20150161814
    Abstract: Techniques for performing clipping of graphics primitives 60 with respect to a clipping boundary 65 are described. The clipping step 10 may be performed separately for each tile of a graphics frame to be rendered, after a primitive list for the tile has been read from a primitive memory 38. Clipping may be performed only for larger primitives whose size exceeds a given threshold. Clipping of a primitive 60 to the clipping boundary 65 may be performed inexactly so that only a single clipped primitive is generated which may extend beyond the clipping boundary. A clipped primitive generated by clipping may be used for a depth function calculation of a primitive setup operation and not for an edge determination.
    Type: Application
    Filed: November 7, 2014
    Publication date: June 11, 2015
    Inventors: Andreas Due ENGH-HALSTVEDT, Frode Heggelund, Jørn Nystad
  • Patent number: 8766991
    Abstract: A graphics processing unit 2 includes a texture pipeline 6 which performs filter operations upon texture values. If the texture values are integer texture values, then they may be processed by the texture pipeline in a variable order corresponding to the order in which they are retrieved from a memory 4. If the texture values are floating point texture values, then they are processed in a fixed order in order to ensure result invariants as the filter operation is non-associative for floating point values. The filter operation is not commenced until all of the floating point texture values have been retrieved from the memory 4 and other available for processing.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: July 1, 2014
    Assignee: ARM Limited
    Inventors: Andreas Due Engh-Halstvedt, Jørn Nystad
  • Patent number: 8743135
    Abstract: A smooth curve is represented in a graphics texture by setting the texels that are inside the curve 1 to a value greater than a predetermined threshold value and the texels that are outside the curve 1 to a value less than the threshold value (or vice-versa). The texture value returned for a sampled position can thus be used to determine whether the sampled position should be treated as being inside the curve 1 or not. The texture is optimised for sampling using bi-linear filtering.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: June 3, 2014
    Assignee: ARM Limited
    Inventors: Jørn Nystad, Rune Holm
  • Patent number: 8698828
    Abstract: In a graphics processing system, when a fragment reaches a texturing stage, it is determined whether the texture to be applied is a static or dynamic texture. If it is determined that the required texels relate to a dynamic texture, then the system first tries to fetch those texels from a dynamic texture memory. If it is found that the texels are not available in the dynamic texture memory, then the relevant texels are generated in an “on-demand” fashion and stored in the dynamic texture memory so that they can be applied to the fragment.
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: April 15, 2014
    Assignee: ARM Limited
    Inventors: Edward Plowman, Jørn Nystad, Borgar Ljosland
  • Patent number: 8681168
    Abstract: In a tile-based graphics processor, primitive lists (bins) are prepared for 2×2 blocks of tiles 40. The processor also determines and stores for each primitive in a bin, distribution information indicating the distribution of the primitive within the set of tiles that the bin corresponds to. Thus a primitive 42 that is found by its bounding box 43 to reside in two of the four tiles that make up the set of 2×2 tiles 40 is also associated with a tile coverage bitmap of the form “0101” to indicate that it lies in tiles “1” and “3” of the 2×2 group of tiles 40. The graphics processor uses the coverage bitmap (information) to determine whether a primitive should be processed for the tile currently being processed.
    Type: Grant
    Filed: January 12, 2010
    Date of Patent: March 25, 2014
    Assignee: ARM Limited
    Inventors: Jørn Nystad, Frank Langtind, Joe Tapply, Daren Croxford
  • Patent number: 8601485
    Abstract: A data processing apparatus and method are provided for processing a received workload in order to generate result data. A thread group generator generates from the received workload a plurality of thread groups to be executed to process the received workload. Each thread may be either an active thread whose output is required to form the result data, or a dummy thread required to resolve the inter-thread dependency for one of the active threads but whose output is not required to form the result data. Execution flow modification circuitry is responsive to the received thread group having at least one dummy thread, to cause the thread execution unit to selectively omit at least part of the execution of at least one of the plurality of instructions when executing each dummy thread, in dependence on control information associated with the predetermined program.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: December 3, 2013
    Assignee: ARM Limited
    Inventors: Andreas Due Engh-Halstvedt, Jørn Nystad
  • Patent number: 8477148
    Abstract: A smooth curve is represented in a graphics texture by setting the texels that are inside the curve 80 to a value greater than a predetermined threshold value for the curve 80 and the texels that are outside the curve 80 to a value of less than the threshold value for the curve 80 (or vice-versa). Such representations of two smooth curves 80, 81 are packed into a single graphics texture (the same texel space) 82 by giving each curve 80, 81 a different threshold value, setting the texel values so that they are appropriately valued with respect to each curve's threshold value, and ensuring that the positions of the threshold value contours of the two curves do not actually overlap each other in the texture.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: July 2, 2013
    Assignee: ARM Limited
    Inventors: Jørn Nystad, Rune Holm
  • Patent number: 8345051
    Abstract: A graphic rendering pipeline has a number of different rendering units and receives fragments for rendering. A renderer stated word cache is used to store rendering state data to be used to configure the rendering units when they render a fragment. Each rendering unit includes a functional block which carries out a rendering operation on a received fragment and a renderer state word interface that can be used to look up the required rendering state data from the renderer state word cache. Each fragment is provided to the rendering pipeline with fragment data that indicates, inter alia, a fragment index, a renderer state word index, and other fragment data that is necessary to render the fragment. When a rendering unit of the rendering pipeline receives a fragment to be rendered, it firstly uses the renderer state word index associated with the fragment to look-up, using its renderer state word interface, the relevant rendering state data from the renderer state word cache.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: January 1, 2013
    Assignee: Arm Norway AS
    Inventors: Jørn Nystad, Mario Blazevic, Borgar Ljosland, Edvard Sørgård
  • Patent number: 8332583
    Abstract: A distribution medium (20) for providing an application to a host system (4) includes an interface element (21) for interfacing with the host (4), a memory or storage module (22) that stores application code representing the application and a hardware element (23). The hardware element (23) directly accesses application content stored in the memory (22), processes that application content to transform it to another form, and then provides the transformed content to the host system (4).
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: December 11, 2012
    Assignee: FXI Technologies AS
    Inventors: Jørn Nystad, Mario Blazevic, Borgar Ljosland, Edvard Sørgård, Frank Langtind
  • Publication number: 20120304194
    Abstract: A data processing apparatus and method are provided for processing a received workload in order to generate result data. A thread group generator generates from the received workload a plurality of thread groups to be executed to process the received workload. Each thread group consists of a plurality of threads, and at least one thread group has an inter-thread dependency existing between the plurality of threads. Each thread may be either an active thread whose output is required to form the result data, or a dummy thread required to resolve the inter-thread dependency for one of the active threads but whose output is not required to form the result data. The thread group generator identifies for each thread group any dummy thread within that thread group. A thread execution unit then executes each thread within a thread group received from the thread group generator by executing a predetermined program comprising a plurality of program instructions.
    Type: Application
    Filed: May 25, 2011
    Publication date: November 29, 2012
    Applicant: ARM LIMITED
    Inventors: Andreas Due Engh-Halstevdt, Jørn Nystad
  • Publication number: 20120299935
    Abstract: A graphics processing unit 2 includes a texture pipeline 6 which performs filter operations upon texture values. If the texture values are integer texture values, then they may be processed by the texture pipeline in a variable order corresponding to the order in which they are retrieved from a memory 4. If the texture values are floating point texture values, then they are processed in a fixed order in order to ensure result invariants as the filter operation is non-associative for floating point values. The filter operation is not commenced until all of the floating point texture values have been retrieved from the memory 4 and other available for processing.
    Type: Application
    Filed: May 25, 2011
    Publication date: November 29, 2012
    Inventors: Andreas Due Engh-Halstevdt, Jørn Nystad
  • Publication number: 20120268480
    Abstract: In a compositing window system, as a respective version of the window for an application is written into a window buffer, a corresponding set of per tile signatures indicative of the content of each respective tile in the window buffer is generated and stored. When an updated version of the window is stored into a window buffer, the set of signature values for the updated version is compared to the set of signature values for the previous version in the window buffer to determine which tiles' content has changed. The set of tiles found to have changed is used to generate a set of regions for a window compositor to write to a window in a display frame buffer to update the window in the display frame buffer to display the new version of the window.
    Type: Application
    Filed: March 30, 2012
    Publication date: October 25, 2012
    Applicant: ARM LIMITED
    Inventors: Tom COOKSEY, Jon Erik OTERHALS, Jørn NYSTAD, Lars ERICSSON, Eivind LILAND, Daren CROXFORD
  • Patent number: 8289343
    Abstract: An array of texture data elements (texels) is subdivided into a plurality of 8×4 texture element blocks, each of which 8×4 texture element blocks encodes two 4×4 texture element sub-blocks 3, 4. Each encoded texture data block includes data indicating a method to be used to generate a set of color values to be used for the texture elements that the encoded data block represents, and data indicating a method to be used for generating the colors of the individual texture elements using that generated set of colors. As well as the individual texture data blocks, a header data block encoding a base set of colors is generated. This base color set defines a set of colors that is used to generate the colors to be used when reproducing each individual encoded texture data block.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: October 16, 2012
    Assignee: ARM Norway AS
    Inventors: Edvard Sørgard, Borgar Ljosland, Jørn Nystad, Mario Blazevic, Frode Heggelund
  • Patent number: 8199146
    Abstract: A graphics processing platform includes a rasteriser 50 that receives primitives representing an image to be displayed for processing. The rasteriser 50 determines which sets of sampling points of the image include sampling points that are covered by a given primitive, and then generates a fragment for rendering for each set of sampling points found to include a sampling point that is covered by the primitive and passes those fragments to a renderer 51 for rendering. The renderer 51 carries out rendering operations on the fragments that it receives, and stores the rendered fragment data in tile buffers 52. The rendered fragment data is stored in multiple copies in the appropriate sample positions in the tile buffers 52, so as to provide a separate set of fragment data for each individual sample position taken of the image. The data from the tile buffers 52 is input to a downsampling unit 53, and hence output to a frame buffer 54 of a display device 55 for display.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: June 12, 2012
    Assignee: ARM Norway AS
    Inventors: Jørn Nystad, Mario Blazevic, Borgar Ljosland, Edvard Sørgard
  • Patent number: 8200939
    Abstract: A memory management arrangement includes a memory management unit, a cache memory and a queue arrangement. The queue is a first-in, first-out (FIFO) buffer which can queue failed memory access requests and return them as inputs to the memory management unit via the bus 5 for retrying through the memory management unit at a later time. If a memory access request sent to the memory management unit experiences a cache “miss”, instead of blocking memory access requests until the required address data has been loaded into the cache, the memory management unit operates to place the failed memory access request in the replay queue, and allows subsequent memory access requests to continue. The failed memory access requests in the queue are then continuously circulated through the memory management unit from the queue alternately with new memory access requests from other access initiators.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: June 12, 2012
    Assignee: ARM Norway AS
    Inventors: Edvard Sørgård, Jørn Nystad, Androas Due Engh-Halstvedt
  • Publication number: 20120081384
    Abstract: An array of texture data elements (texels) is subdivided into a plurality of 8×4 texture element blocks, each of which 8×4 texture element blocks encodes two 4×4 texture element sub-blocks 3, 4. Each encoded texture data block includes data indicating a method to be used to generate a set of colour values to be used for the texture elements that the encoded data block represents, and data indicating a method to be used for generating the colours of the individual texture elements using that generated set of colours. As well as the individual texture data blocks, a header data block encoding a base set of colours is generated. This base colour set defines a set of colours that is used to generate the colours to be used when reproducing each individual encoded texture data block.
    Type: Application
    Filed: December 8, 2011
    Publication date: April 5, 2012
    Applicant: ARM Norway AS
    Inventors: Edvard Sørgard, Borgar Ljosland, Jørn Nystad, Mario Blazevic, Frode Heggelund
  • Patent number: 8102402
    Abstract: An array of texture data elements (texels) is subdivided into a plurality of 8×4 texture element blocks, each of which 8×4 texture element blocks encodes two 4×4 texture element sub-blocks 3, 4. Each encoded texture data block includes data indicating a method to be used to generate a set of color values to be used for the texture elements that the encoded data block represents, and data indicating a method to be used for generating the colors of the individual texture elements using that generated set of colors. As well as the individual texture data blocks, a header data block encoding a base set of colors is generated. This base color set defines a set of colors that is used to generate the colors to be used when reproducing each individual encoded texture data block.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: January 24, 2012
    Assignee: ARM Norway AS
    Inventors: Edvard Sørgard, Borgar Ljosland, Jørn Nystad, Mario Blazevic, Frode Heggelund