Patents by Inventor Jack A. Sartell

Jack A. Sartell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4273859
    Abstract: An improved method of forming raised input/output (I/O) terminals on the top surfaces of semiconductor elements of a semiconductor wafer. After via openings are formed through the passivation layer of such elements at locations where the I/O terminals are to be formed, which openings provide access to the metalization layers of the elements photolithographic techniques using a layer of heat resistant photoresist which is laminated to the top surface of the wafer are used to form openings through the photoresist layer to provide access to the metalization layers through the vias. A barrier metal layer is deposited on the exposed surfaces of the photoresist, and the metalization layers, and passivation layer of the elements. The barrier metal layer overlying the photoresist and then the photoresist are stripped from the wafer. The same photolithographic techniques using the same heat resistant photoresist material are used to define openings surrounding the barrier metal lining the via openings.
    Type: Grant
    Filed: December 31, 1979
    Date of Patent: June 16, 1981
    Assignee: Honeywell Information Systems Inc.
    Inventors: Arthur H. Mones, Jack A. Sartell, Vahram S. Kardashian