Patents by Inventor Jack P. Salerno

Jack P. Salerno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5317436
    Abstract: A slide assembly adapted for use with a projector body, having a projector body, having a light source, an optical system and a chamber in which an image forming element can be placed. The slide assembly has a housing adapted to be positioned over the slide projector body with an active matrix display slide movably mounted to housing with a storage position in the housing and an operating position outside the housing. In the operating position the display slide is positioned in a slide projector chamber for projection of an image onto an external viewing surface.
    Type: Grant
    Filed: April 22, 1992
    Date of Patent: May 31, 1994
    Assignee: Kopin Corporation
    Inventors: Mark B. Spitzer, Jack P. Salerno, Paul M. Zavracky
  • Patent number: 5258325
    Abstract: The invention relates to device processing, packaging and interconnects that will yield integrated electronic circuitry of high density and complexity. Processes include the formation of complex multi-function circuitry on common module substrates using circuit tiles of silicon thin-films which are transferred, interconnected and packaged. Circuit modules using integrated transfer/interconnect processes compatible with extremely high density and complexity provide large-area active-matrix displays with on-board drivers and logic in modules.
    Type: Grant
    Filed: February 13, 1992
    Date of Patent: November 2, 1993
    Assignee: Kopin Corporation
    Inventors: Mark B. Spitzer, Jack P. Salerno, Jeffrey Jacobsen, Brenda Dingle, Duy-Phach Vu, Paul M. Zavracky
  • Patent number: 5074952
    Abstract: The improved zone-melt recrystallization apparatus is comprised of a heating element having a plurality of individually controllable heating elements. The elements are heated in sequence to generate a melted zone within a semiconductor material which is translated across the material by heating then cooling adjacent heating elements to recrystallize the material.
    Type: Grant
    Filed: June 28, 1989
    Date of Patent: December 24, 1991
    Assignee: Kopin Corporation
    Inventors: Paul M. Zavracky, Jack P. Salerno, Matthew M. Zavracky
  • Patent number: 4989934
    Abstract: An monolithic integrated transceiver formed on an Si substrate comprising: a III-V compound light source, a III-V compound light detector and a pyramidal groove formed in the substrate for aligning an optical fiber with said transmitter.
    Type: Grant
    Filed: November 3, 1989
    Date of Patent: February 5, 1991
    Assignee: Kopin Corporation
    Inventors: Paul M. Zavracky, Matthew M. Zavracky, John C. C. Fan, Jack P. Salerno
  • Patent number: 4910167
    Abstract: A GaAs containing nucleation layer is deposited upon Si, Ge/Si, or other single crystal substrate from triethyl gallium (TEG). Deposition from TEG allows a lower deposition temperature which provides a low level of substrate contamination and improved surface morphology.
    Type: Grant
    Filed: November 13, 1987
    Date of Patent: March 20, 1990
    Assignee: Kopin Corporation
    Inventors: Jhang W. Lee, Richard E. McCullough, Jack P. Salerno
  • Patent number: 4890895
    Abstract: An optical device formed on an Si substrate comprising: a III-V optical transmitter formed on the Si substrate, a silicon device formed in or on, the Si substrate and an alignment groove formed in the substrate for aligning an optical fiber with said transmitter.
    Type: Grant
    Filed: November 13, 1987
    Date of Patent: January 2, 1990
    Assignee: Kopin Corporation
    Inventors: Paul M. Zavracky, Matthew M. Zavracky, John C. C. Fan, Jack P. Salerno
  • Patent number: 4826784
    Abstract: A method of OMCVD heteroepitaxy of III/V (GaAs) material on a patterned Si substrate is described wherein heteroepitaxy deposition occurs only on the exposed Si surfaces and nowhere else.
    Type: Grant
    Filed: November 13, 1987
    Date of Patent: May 2, 1989
    Assignee: Kopin Corporation
    Inventors: Jack P. Salerno, Jhang W. Lee, Richard E. McCullough
  • Patent number: 4366338
    Abstract: A method of compensating grain boundaries or dislocations causing interstices to form particularly in polycrystalline semiconductor materials is disclosed which comprises selectively diffusing opposite impurity-type donor semiconductor material into the interstice to thereby reduce the conductivity of the interstice.
    Type: Grant
    Filed: January 9, 1981
    Date of Patent: December 28, 1982
    Assignee: Massachusetts Institute of Technology
    Inventors: George W. Turner, John C. C. Fan, Jack P. Salerno
  • Patent number: D347840
    Type: Grant
    Filed: August 30, 1993
    Date of Patent: June 14, 1994
    Assignee: Kopin Corporation
    Inventors: Ronald Gale, Richard McCullough, Jack P. Salerno
  • Patent number: D349896
    Type: Grant
    Filed: November 16, 1992
    Date of Patent: August 23, 1994
    Assignee: Kopin Corporation
    Inventors: Ronald Gale, Richard McClullough, Jack P. Salerno
  • Patent number: D355648
    Type: Grant
    Filed: February 10, 1993
    Date of Patent: February 21, 1995
    Assignee: Kopin Corporation
    Inventors: Ronald Gale, Richard McCullough, Jack P. Salerno
  • Patent number: D355649
    Type: Grant
    Filed: February 10, 1993
    Date of Patent: February 21, 1995
    Assignee: Kopin Corporation
    Inventors: Ronald Gale, Richard McClullough, Jack P. Salerno