Patents by Inventor Jackie Cheng

Jackie Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070218851
    Abstract: Multistage RF transmitter and receiver circuits may use independently variable RF and IF local oscillators, allowing the RF and IF local oscillator frequencies for a given RF channel to be selected to have a large common factor with respect to the reference oscillator used by the local oscillator circuits, thus allowing the use of small divisor numbers in the local oscillator circuits and reducing phase noise. Independent high-side and low-side RF local oscillators may be provided and selectively used depending on the RF channel to be transmitted or received.
    Type: Application
    Filed: May 16, 2007
    Publication date: September 20, 2007
    Inventors: Zaw Soe, Tony Yang, Jackie Cheng, Sining Zhou, Kuangyu Li, Fei-Ran Yang, Shoufang Chen, Tom Baker
  • Patent number: 7266352
    Abstract: Multistage RF transmitter and receiver circuits may use independently variable RF and IF local oscillators, allowing the RF and IF local oscillator frequencies for a given RF channel to be selected to have a large common factor with respect to the reference oscillator used by the local oscillator circuits, thus allowing the use of small divisor numbers in the local oscillator circuits and reducing phase noise. Independent high-side and low-side RF local oscillators may be provided and selectively used depending on the RF channel to be transmitted or received.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: September 4, 2007
    Assignee: Wionics Research
    Inventors: Zaw Min Soe, Tony Yang, Jackie Cheng, Sining Zhou, Kuangyu Li, Fei-Ran Yang, Shoufang Chen, Tom Baker
  • Patent number: 6992526
    Abstract: A feedback system has a settling time that is independent of the forward gain of the amplifier stage, and a feedback path that is responsive to the magnitude of DC offset in the output signal. Settling time may be made independent of the forward gain of the amplifier stage by providing a constant loop gain in the amplifier stage through active gain control of both the forward and linear feedback amplifier elements. The feedback path may be made responsive to the magnitude of DC offset in the output signal by providing a non-linear transconductance in the feedback path that varies the high pass corner and hence the DC offset reduction time of the amplifier stage in response the magnitude of DC offset in the output signal.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: January 31, 2006
    Assignee: Wionics Research
    Inventor: Jackie Cheng
  • Publication number: 20050266806
    Abstract: Multistage RF transmitter and receiver circuits may use independently variable RF and IF local oscillators, allowing the RF and IF local oscillator frequencies for a given RF channel to be selected to have a large common factor with respect to the reference oscillator used by the local oscillator circuits, thus allowing the use of small divisor numbers in the local oscillator circuits and reducing phase noise. Independent high-side and low-side RF local oscillators may be provided and selectively used depending on the RF channel to be transmitted or received.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 1, 2005
    Inventors: Zaw Min Soe, Tony Yang, Jackie Cheng, Sining Zhou, Kuangyu Li, Fei-Ran Yang, Shoufang Chen, Tom Baker
  • Publication number: 20050258989
    Abstract: Systems and methods for canceling static and dynamic DC offsets by combining a digital DC offset correction scheme with an analog DC offset correction scheme. A feedback-based digital DC offset correction scheme provides different adjustment levels for a plurality of discrete gain states and the analog DC offset correction scheme operates in different cancellation modes dependent on a frame structure. A digital DC offset correction scheme collects DC offset control information and provides adjustment levels. In addition, a negative-feedback based switchable high pass filter has a plurality modes of operation, where one mode of operation includes an all-pass filter.
    Type: Application
    Filed: May 21, 2004
    Publication date: November 24, 2005
    Inventors: Kuangyu Li, Song-Nien Tang, Jackie Cheng, Zaw Soe
  • Patent number: 6965256
    Abstract: An output stage circuit for a current mode device provides open loop reduction or cancellation of DC offset in differential output signals. Differential input signals are received and sourcing current mirrors provide mirrors of the differential input signals to output nodes. Sinking current mirrors also provide mirrors of opposite polarity of the differential input signals to the output nodes corresponding to the opposing sourcing current mirrors. The summing of the mirror currents at the output nodes substantially reduces or eliminates the DC offset components present in the input signals.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: November 15, 2005
    Assignee: Wionics Research
    Inventor: Jackie Cheng
  • Publication number: 20050195021
    Abstract: An output stage circuit for a current mode device provides open loop reduction or cancellation of DC offset in differential output signals. Differential input signals are received and sourcing current mirrors provide mirrors of the differential input signals to output nodes. Sinking current mirrors also provide mirrors of opposite polarity of the differential input signals to the output nodes corresponding to the opposing sourcing current mirrors. The summing of the mirror currents at the output nodes substantially reduces or eliminates the DC offset components present in the input signals.
    Type: Application
    Filed: May 28, 2004
    Publication date: September 8, 2005
    Inventor: Jackie Cheng
  • Publication number: 20050195024
    Abstract: A feedback system has a settling time that is independent of the forward gain of the amplifier stage, and a feedback path that is responsive to the magnitude of DC offset in the output signal. Settling time may be made independent of the forward gain of the amplifier stage by providing a constant loop gain in the amplifier stage through active gain control of both the forward and linear feedback amplifier elements. The feedback path may be made responsive to the magnitude of DC offset in the output signal by providing a non-linear transconductance in the feedback path that varies the high pass corner and hence the DC offset reduction time of the amplifier stage in response the magnitude of DC offset in the output signal.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 8, 2005
    Inventor: Jackie Cheng
  • Patent number: 6933789
    Abstract: Embodiments of the invention provide techniques for calibrating voltage-controlled oscillators (VCOs). Multiple VCOs may be disposed on a chip with the VCOs having different frequency ranges. The VCOs may be selected and tested to determine a desired VCO to use to tune to a selected channel frequency. Each of the VCOs has multiple possible varactor configurations. The varactor configurations of the desired VCO determined to be used to tune to the selected channel frequency can be selected and tested to determine a desired varactor configuration for the desired VCO. The desired VCO with the desired varactor configuration will preferably be able to produce a full range of desired frequencies corresponding to all channel frequencies desired.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: August 23, 2005
    Assignee: Skyworks Solutions, Inc.
    Inventors: Alyosha C. Molnar, Rahul Magoon, Madhukar Reddy, Jackie Cheng
  • Publication number: 20050104665
    Abstract: Embodiments of the invention provide techniques for calibrating voltage-controlled oscillators (VCOs). Multiple VCOs may be disposed on a chip with the VCOs having different frequency ranges. The VCOs may be selected and tested to determine a desired VCO to use to tune to a selected channel frequency. Each of the VCOs has multiple possible varactor configurations. The varactor configurations of the desired VCO determined to be used to tune to the selected channel frequency can be selected and tested to determine a desired varactor configuration for the desired VCO. The desired VCO with the desired varactor configuration will preferably be able to produce a full range of desired frequencies corresponding to all channel frequencies desired.
    Type: Application
    Filed: November 13, 2003
    Publication date: May 19, 2005
    Inventors: Alyosha Molnar, Rahul Magoon, Madhukar Reddy, Jackie Cheng
  • Patent number: 6720834
    Abstract: A programmable capacitive network for use in a tunable resonant circuit is set forth that may be used in a number of different applications, but is particularly useful in the tuning of a voltage controlled oscillator formed on a substrate, such as a semiconductor substrate or the like. The programmable capacitive network includes a plurality of capacitive elements. An interconnected network of voltage gate elements and fuse elements are interconnected with the capacitive elements to selectively connect one or more of the plurality of capacitive elements in the resonant circuit in response to at least one program control signal. In accordance with one embodiment, the voltage gate elements are diodes.
    Type: Grant
    Filed: April 11, 2002
    Date of Patent: April 13, 2004
    Assignee: Skyworks Solutions, Inc.
    Inventors: Evan S. McCarthy, Jackie Cheng
  • Patent number: 6707342
    Abstract: A tuning circuit for use in tuning multiple voltage-controlled oscillators (VCOs) of a phase-locked loop (PLL) is provided. A search algorithm is used to determine which VCO to use for a given frequency to be synthesized by the PLL. The tuning circuit provides a binary representation, associated with the frequency to synthesize, to the PLL. The PLL responds to this representation by attempting to synthesize the associated frequency. New binary representations are provided until an indication of a threshold frequency between multiple VCOs is determined. A record of the threshold frequency is stored. The binary representation of a frequency to be synthesized and the stored record of the threshold frequency are used to provide an indication of which VCO of the PLL to use to synthesize the desired frequency.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: March 16, 2004
    Assignee: Skyworks Solutions, Inc.
    Inventors: Jeffrey M. Zachan, Jackie Cheng, Alyosha C. Molnar
  • Publication number: 20030193373
    Abstract: A programmable capacitive network for use in a tunable resonant circuit is set forth that may be used in a number of different applications, but is particularly useful in the tuning of a voltage controlled oscillator formed on a substrate, such as a semiconductor substrate or the like. The programmable capacitive network includes a plurality of capacitive elements. An interconnected network of voltage gate elements and fuse elements are interconnected with the capacitive elements to selectively connect one or more of the plurality of capacitive elements in the resonant circuit in response to at least one program control signal. In accordance with one embodiment, the voltage gate elements are diodes.
    Type: Application
    Filed: April 11, 2002
    Publication date: October 16, 2003
    Inventors: Evan S. McCarthy, Jackie Cheng
  • Patent number: D456535
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: April 30, 2002
    Assignee: Universal Candle Co., Ltd.
    Inventor: Jackie Cheng Chak Yin