Abstract: In a transistor fabrication process, the use of a three-step base doping technique enables the characteristics of a vertical bipolar transistor to be controllably reproduced at highly optimal values from run to run. Insulating spacers (52A) are employed in forming a self-aligned base contact zone (58B). A shallow emitter (46) is created by outdiffusion from a patterned non-monocrystalline semiconductor layer (38A) that serves as the emitter contact. The fabrication process is compatible with the largely simultaneous manufacture of an insulated-gate field-effect transistor of the lightly doped drain type.