Patents by Inventor Jacquana Diep

Jacquana Diep has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8895104
    Abstract: A polymeric membrane on a support, wherein the polymeric membrane includes a crosslinked polymer covalently bound to a molecular cage compound. An interfacial polymerization method for making the polymeric membrane is also disclosed.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: November 25, 2014
    Assignee: International Business Machines Corporation
    Inventors: Young-Hye Na, Ratnam Sooriyakumaran, Ankit Vora, Jacquana Diep
  • Publication number: 20130001153
    Abstract: A polymeric membrane on a support, wherein the polymeric membrane includes a crosslinked polymer covalently bound to a molecular cage compound. An interfacial polymerization method for making the polymeric membrane is also disclosed.
    Type: Application
    Filed: July 1, 2011
    Publication date: January 3, 2013
    Applicant: International Business Machines Corporation
    Inventors: Young-Hye Na, Ratnam Sooriyakumaran, Ankit Vora, Jacquana Diep
  • Patent number: 8297986
    Abstract: Various sockets for packaged integrated circuits and methods of making the same are provided. In one aspect, a method of mounting a semiconductor chip is provided that includes providing a package that has a base substrate with a first side and a second side opposite the first side. The second side has a central region. The package includes a semiconductor chip and a lid coupled to the first side. A socket is provided for receiving the base substrate. The socket includes a mound that projects toward the second side of the base substrate when the base substrate is seated in the socket to provide support for the central region of the base substrate. The package is mounted in the socket. The mound provides support for the central region of the base substrate.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: October 30, 2012
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Seah Sun Too, Raj N. Master, Jacquana Diep, Mohammad Khan
  • Patent number: 7633151
    Abstract: Various integrated circuit packages, lids therefor and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing an integrated circuit package lid that has a surface adapted to face towards an integrated circuit, and forming a wetting film on the surface. The wetting film has at least one void where the surface of the lid is exposed. The void inhibits bonding so that a stress reduction site is produced.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: December 15, 2009
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Seah Sun Too, Jacquana Diep, Mohammad Khan
  • Patent number: 7544542
    Abstract: Various method and apparatus for packaging an integrated circuit are provided. In one aspect, a method of packaging an integrated circuit is provided that includes coupling an integrated circuit to a substrate, mixing an adhesive with a plurality of particles, and coupling a lid to the substrate with the adhesive. At least a portion of the plurality of particles in the adhesive oppose compressive force from the lid to restrict rotation of the lid relative to the substrate.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: June 9, 2009
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Seah Sun Too, Raj N. Master, Jacquana Diep, Mohammad Khan
  • Patent number: 7513035
    Abstract: Various integrated circuit package elements are provided. In one aspect, an integrated circuit package device is provided that includes a lid for covering an integrated circuit. The lid has a convex surface for applying pressure on the integrated circuit when the lid is placed in a selected position. In another aspect, an integrated circuit package device is provided that includes a lid that has a surface for applying pressure to an integrated circuit when the lid is in a selected position. A gold film is coupled to the surface. The gold film has a periphery and a plurality of rounds extending from the periphery.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: April 7, 2009
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Seah Sun Too, Mohammad Khan, James Hayward, Jacquana Diep
  • Publication number: 20080230893
    Abstract: Various integrated circuit packages, lids therefor and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing an integrated circuit package lid that has a surface adapted to face towards an integrated circuit, and forming a wetting film on the surface. The wetting film has at least one void where the surface of the lid is exposed. The void inhibits bonding so that a stress reduction site is produced.
    Type: Application
    Filed: March 16, 2007
    Publication date: September 25, 2008
    Inventors: Seah Sun Too, Jacquana Diep, Mohammad Khan
  • Publication number: 20080227310
    Abstract: Various sockets for packaged integrated circuits and methods of making the same are provided. In one aspect, a method of mounting a semiconductor chip is provided that includes providing a package that has a base substrate with a first side and a second side opposite the first side. The second side has a central region. The package includes a semiconductor chip and a lid coupled to the first side. A socket is provided for receiving the base substrate. The socket includes a mound that projects toward the second side of the base substrate when the base substrate is seated in the socket to provide support for the central region of the base substrate. The package is mounted in the socket. The mound provides support for the central region of the base substrate.
    Type: Application
    Filed: March 16, 2007
    Publication date: September 18, 2008
    Inventors: Seah Sun Too, Raj N. Master, Jacquana Diep, Mohammad Khan
  • Publication number: 20080124841
    Abstract: Various method and apparatus for packaging an integrated circuit are provided. In one aspect, a method of packaging an integrated circuit is provided that includes coupling an integrated circuit to a substrate, mixing an adhesive with a plurality of particles, and coupling a lid to the substrate with the adhesive. At least a portion of the plurality of particles in the adhesive oppose compressive force from the lid to restrict rotation of the lid relative to the substrate.
    Type: Application
    Filed: August 7, 2006
    Publication date: May 29, 2008
    Inventors: Seah Sun Too, Raj N. Master, Jacquana Diep, Mohammad Khan
  • Publication number: 20070284144
    Abstract: Various integrated circuit package elements are provided. In one aspect, an integrated circuit package device is provided that includes a lid for covering an integrated circuit. The lid has a convex surface for applying pressure on the integrated circuit when the lid is placed in a selected position. In another aspect, an integrated circuit package device is provided that includes a lid that has a surface for applying pressure to an integrated circuit when the lid is in a selected position. A gold film is coupled to the surface. The gold film has a periphery and a plurality of rounds extending from the periphery.
    Type: Application
    Filed: June 7, 2006
    Publication date: December 13, 2007
    Inventors: Seah Sun Too, Mohammad Khan, James Hayward, Jacquana Diep