Patents by Inventor Jacques Herry

Jacques Herry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of making in an integrated circuit including simplifying metal shapes
    Patent number: 8607183
    Abstract: A method for simplifying metal shapes in an integrated circuit including receiving an incoming wire layout for at least one metal layer of an integrated circuit, the incoming wire layout for the at least one layer including a plurality of wires running in a preferred direction and a plurality of vias connected thereto.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: December 10, 2013
    Assignee: Infineon Technologies AG
    Inventors: Hanno Melzner, Olivier Rizzo, Jacques Herry
  • METHOD OF MAKING IN AN INTEGRATED CIRCUIT INCLUDING SIMPLIFYING METAL SHAPES
    Publication number: 20110113400
    Abstract: A method for simplifying metal shapes in an integrated circuit including receiving an incoming wire layout for at least one metal layer of an integrated circuit, the incoming wire layout for the at least one layer including a plurality of wires running in a preferred direction and a plurality of vias connected thereto.
    Type: Application
    Filed: January 20, 2011
    Publication date: May 12, 2011
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Hanno Melzner, Olivier Rizzo, Jacques Herry
  • Method of making an integrated circuit including simplifying metal shapes
    Patent number: 7934189
    Abstract: A method for simplifying metal shapes in an integrated circuit including receiving an incoming wire layout for at least one metal layer of an integrated circuit, the incoming wire layout for the at least one layer including a plurality of wires running in a preferred direction and a plurality of vias connected thereto.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: April 26, 2011
    Assignee: Infineon Technologies AG
    Inventors: Hanno Melzner, Olivier Rizzo, Jacques Herry
  • Method and apparatus for automatic routing yield optimization
    Patent number: 7698679
    Abstract: A method is provided for optimizing routing on a substrate such as an integrated circuit or printed circuit board. The method defines a plurality of parallel strips on an initial routing layout of conductors for a layer of an integrated circuit. Each conductor within each strip defines a brick. For each of the plurality of strips, a spacing between bricks and a brick thickness of each brick is adjusted as a function of i) a location of a brick in adjacent strips corresponding to the same conductor; ii) a desired brick thickness; and iii) a desired brick spacing.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: April 13, 2010
    Assignee: Infineon Technologies AG
    Inventors: Olivier Rizzo, Hanno Melzner, Jacques Herry
  • METHOD OF MAKING AN INTEGRATED CIRCUIT INCLUDING SIMPLIFYING METAL SHAPES
    Publication number: 20090193382
    Abstract: A method for simplifying metal shapes in an integrated circuit including receiving an incoming wire layout for at least one metal layer of an integrated circuit, the incoming wire layout for the at least one layer including a plurality of wires running in a preferred direction and a plurality of vias connected thereto.
    Type: Application
    Filed: January 25, 2008
    Publication date: July 30, 2009
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Hanno Melzner, Olivier Rizzo, Jacques Herry
  • Method and apparatus for automatic routing yield optimization
    Publication number: 20080010934
    Abstract: A method is provided for optimizing routing on a substrate such as an integrated circuit or printed circuit board. The method defines a plurality of parallel strips on an initial routing layout of conductors for a layer of an integrated circuit. Each conductor within each strip defines a brick. For each of the plurality of strips, a spacing between bricks and a brick thickness of each brick is adjusted as a function of i) a location of a brick in adjacent strips corresponding to the same conductor; ii) a desired brick thickness; and iii) a desired brick spacing.
    Type: Application
    Filed: July 13, 2006
    Publication date: January 17, 2008
    Applicant: Infineon Technologies AG
    Inventors: Olivier Rizzo, Hanno Melzner, Jacques Herry