Patents by Inventor Jae Doo Kwon
Jae Doo Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230083412Abstract: A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure.Type: ApplicationFiled: November 18, 2022Publication date: March 16, 2023Applicant: Amkor Technology Singapore Holding Pte. LtdInventors: Won Bae BANG, Byong Jin KIM, Gi Jeong KIM, Jae Doo KWON, Hyung Il JEON
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Patent number: 11508635Abstract: A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure.Type: GrantFiled: April 29, 2020Date of Patent: November 22, 2022Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Won Bae Bang, Byong Jin Kim, Gi Jeong Kim, Jae Doo Kwon, Hyung Il Jeon
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Publication number: 20200258803Abstract: A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure.Type: ApplicationFiled: April 29, 2020Publication date: August 13, 2020Applicant: Amkor Technology Singapore Holding Pte. LtdInventors: Won Bae BANG, Byong Jin KIM, Gi Jeong KIM, Jae Doo KWON, Hyung Il JEON
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Patent number: 10685897Abstract: A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure.Type: GrantFiled: July 11, 2018Date of Patent: June 16, 2020Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Won Bae Bang, Byong Jin Kim, Gi Jeong Kim, Jae Doo Kwon, Hyung Il Jeon
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Publication number: 20180323129Abstract: A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure.Type: ApplicationFiled: July 11, 2018Publication date: November 8, 2018Applicant: Amkor Technology Inc.Inventors: Won Bae Bang, Byong Jin Kim, Gi Jeong Kim, Jae Doo Kwon, Hyung Il Jeon
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Patent number: 10049954Abstract: A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure.Type: GrantFiled: June 3, 2016Date of Patent: August 14, 2018Assignee: Amkor Technology, Inc.Inventors: Won Bae Bang, Byong Jin Kim, Gi Jeong Kim, Jae Doo Kwon, Hyung Il Jeon
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Patent number: 9633932Abstract: An electronic package structure includes a substrate having a plurality of conductive leads. A discharge hole is disposed to extend through the substrate. An electronic chip is electrically connected to the plurality of conductive leads. A case is connected to the substrate and defines a cavity between the substrate and an upper of the case. The discharge hole and the electronic chip are disposed within the cavity, and the discharge hole is open to the outside in the electronic package structure. The discharge hole is configured to discharge air pressure that forms during the assembly process thereby improving the reliability of the electronic package structure.Type: GrantFiled: May 26, 2015Date of Patent: April 25, 2017Assignee: Amkor Technology, Inc.Inventors: Kyoung Yeon Lee, Byong Jin Kim, Kyung Su Kim, Hyung Il Jeon, Jae Doo Kwon
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Publication number: 20170069558Abstract: A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure.Type: ApplicationFiled: June 3, 2016Publication date: March 9, 2017Applicant: Amkor Technology, Inc.Inventors: Won Bae Bang, Byong Jin Kim, Gi Jeong Kim, Jae Doo Kwon, Hyung Il Jeon
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Publication number: 20150279767Abstract: In one embodiment, a lead frame package structure includes a lead frame having sides that surround a die paddle and on which a plurality of leads are formed. An electronic chip is attached to the die paddle and a case is attached to the lead frame to seal the leads and the electronic chip. One or more discharge holes are formed on and extending through one or more specific leads and/or on and extending through a predetermined position of the die paddle. The discharge holes are configured to discharge air pressure that forms during the assembly process thereby improving the reliability of the packaged electronic chip.Type: ApplicationFiled: May 26, 2015Publication date: October 1, 2015Applicant: AMKOR TECHNOLOGY, INC.Inventors: Kyoung Yeon Lee, Byong Jin Kim, Kyung Su Kim, Hyung Il Jeon, Jae Doo Kwon
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Patent number: 9054089Abstract: In one embodiment, a lead frame package structure includes a lead frame having sides that surround a die paddle and on which a plurality of leads are formed. An electronic chip is attached to the die paddle and a case is attached to the lead frame to seal the leads and the electronic chip. One or more discharge holes are formed on and extending through one or more specific leads and/or on and extending through a predetermined position of the die paddle. The discharge holes are configured to discharge air pressure that forms during the assembly process thereby improving the reliability of the packaged electronic chip.Type: GrantFiled: July 23, 2013Date of Patent: June 9, 2015Assignee: Amkor Technology, Inc.Inventors: Kyoung Yeon Lee, Byong Jin Kim, Kyung Su Kim, Hyung Il Jeon, Jae Doo Kwon
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Publication number: 20140042605Abstract: In one embodiment, a lead frame package structure includes a lead frame having sides that surround a die paddle and on which a plurality of leads are formed. An electronic chip is attached to the die paddle and a case is attached to the lead frame to seal the leads and the electronic chip. One or more discharge holes are formed on and extending through one or more specific leads and/or on and extending through a predetermined position of the die paddle. The discharge holes are configured to discharge air pressure that forms during the assembly process thereby improving the reliability of the packaged electronic chip.Type: ApplicationFiled: July 23, 2013Publication date: February 13, 2014Applicant: Amkor Technology, Inc.Inventors: Kyoung Yeon Lee, Byong Jin Kim, Kyung Su Kim, Hyung Il Jeon, Jae Doo Kwon