Patents by Inventor Jae Hun Bae
Jae Hun Bae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11948808Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.Type: GrantFiled: December 6, 2021Date of Patent: April 2, 2024Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.Inventors: Dong Jin Kim, Jin Han Kim, Won Chul Do, Jae Hun Bae, Won Myoung Ki, Dong Hoon Han, Do Hyung Kim, Ji Hun Lee, Jun Hwan Park, Seung Nam Son, Hyun Cho, Curtis Zwenger
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Publication number: 20240100340Abstract: Provided is a device for relieving headache and pain caused by temporomandibular joint disorders may include: a body having a neck band surroundingly worn on a user's neck, first connectors extending forwardly from both ends of the neck band by first set lengths, and second connectors extending upwardly from front ends of the first connectors by second set lengths; first low frequency electrostimulators disposed on the second connectors and coming into close contact with the temporalis muscles, when the body is worn on the user's head, to apply low frequencies to the temporalis muscles; and second low frequency electrostimulators disposed on the connected portions between the first connectors and the second connectors and coming into close contact with the masseter muscles, when the body is worn on the user's head, to apply low frequencies to the masseter muscles.Type: ApplicationFiled: December 8, 2023Publication date: March 28, 2024Inventors: Tae Hun KIM, Won Sik BAE, Jae Hyeong OH, Dong Jin YOU
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Publication number: 20230137998Abstract: In one example, a semiconductor device comprises a substrate comprising a top side and a bottom side, a dielectric structure, and a conductive structure, wherein the conductive structure comprises a first terminal exposed from the dielectric structure, an electronic component over the top side of the substrate, and an encapsulant over the top side of the substrate and covering a lateral side of the electronic component. The dielectric structure comprises a first pattern base and first pattern wall that extends from the first pattern base and is adjacent to the first terminal, and the first terminal is bounded by the first pattern wall. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: November 3, 2021Publication date: May 4, 2023Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: George Scott, Ki Yeul Yang, Jae Hun Bae
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Publication number: 20230057803Abstract: A semiconductor device with redistribution layers on partial encapsulation is disclosed and may include providing a carrier with a non-photosensitive protection layer, forming a pattern in the non-photosensitive protection layer, providing a semiconductor die with a contact pad on a first surface, and bonding the semiconductor die to the non-photosensitive protection layer such that the contact pad aligns with the pattern formed in the non-photosensitive protection layer. A second surface opposite to the first surface of the semiconductor die, side surfaces between the first and second surfaces of the semiconductor die, and a portion of a first surface of the non-photosensitive protection layer may be encapsulated with an encapsulant. The carrier may be removed leaving the non-photosensitive protection layer bonded to the semiconductor die. A redistribution layer may be formed on the contact pad and a second surface of the non-photosensitive protection layer opposite to the first surface.Type: ApplicationFiled: August 19, 2022Publication date: February 23, 2023Inventors: Jong Sik Paek, Jin Young Kim, YoonJoo Kim, Jin Han Kim, SeungJae Lee, Se Woong Cha, SungKyu Kim, Jae Hun Bae, Dong Jin Kim, Doo Hyun Park
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Patent number: 11424180Abstract: A semiconductor device with redistribution layers on partial encapsulation is disclosed and may include providing a carrier with a non-photosensitive protection layer, forming a pattern in the non-photosensitive protection layer, providing a semiconductor die with a contact pad on a first surface, and bonding the semiconductor die to the non-photosensitive protection layer such that the contact pad aligns with the pattern formed in the non-photosensitive protection layer. A second surface opposite to the first surface of the semiconductor die, side surfaces between the first and second surfaces of the semiconductor die, and a portion of a first surface of the non-photosensitive protection layer may be encapsulated with an encapsulant. The carrier may be removed leaving the non-photosensitive protection layer bonded to the semiconductor die. A redistribution layer may be formed on the contact pad and a second surface of the non-photosensitive protection layer opposite to the first surface.Type: GrantFiled: June 2, 2020Date of Patent: August 23, 2022Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.Inventors: Jong Sik Paek, Jin Young Kim, YoonJoo Kim, Jin Han Kim, SeungJae Lee, Se Woong Cha, SungKyu Kim, Jae Hun Bae, Dong Jin Kim, Doo Hyun Park
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Publication number: 20220165582Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.Type: ApplicationFiled: December 6, 2021Publication date: May 26, 2022Inventors: Dong Jin Kim, Jin Han Kim, Won Chul Do, Jae Hun Bae, Won Myoung Ki, Dong Hoon Han, Do Hyung Kim, Ji Hun Lee, Jun Hwan Park, Seung Nam Son, Hyun Cho, Curtis Zwenger
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Publication number: 20210398930Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: ApplicationFiled: May 24, 2021Publication date: December 23, 2021Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
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Patent number: 11195726Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.Type: GrantFiled: February 4, 2020Date of Patent: December 7, 2021Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Dong Jin Kim, Jin Han Kim, Won Chul Do, Jae Hun Bae, Won Myoung Ki, Dong Hoon Han, Do Hyung Kim, Ji Hun Lee, Jun Hwan Park, Seung Nam Son, Hyun Cho, Curtis Zwenger
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Patent number: 11018107Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: GrantFiled: May 20, 2019Date of Patent: May 25, 2021Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
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Publication number: 20200365504Abstract: A semiconductor device with redistribution layers on partial encapsulation is disclosed and may include providing a carrier with a non-photosensitive protection layer, forming a pattern in the non-photosensitive protection layer, providing a semiconductor die with a contact pad on a first surface, and bonding the semiconductor die to the non-photosensitive protection layer such that the contact pad aligns with the pattern formed in the non-photosensitive protection layer. A second surface opposite to the first surface of the semiconductor die, side surfaces between the first and second surfaces of the semiconductor die, and a portion of a first surface of the non-photosensitive protection layer may be encapsulated with an encapsulant. The carrier may be removed leaving the non-photosensitive protection layer bonded to the semiconductor die. A redistribution layer may be formed on the contact pad and a second surface of the non-photosensitive protection layer opposite to the first surface.Type: ApplicationFiled: June 2, 2020Publication date: November 19, 2020Inventors: Jong Sik Paek, Jin Young Kim, YoonJoo Kim, Jin Han Kim, SeungJae Lee, Se Woong Cha, SungKyu Kim, Jae Hun Bae, Dong Jin Kim, Doo Hyun Park
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Publication number: 20200321222Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.Type: ApplicationFiled: February 4, 2020Publication date: October 8, 2020Inventors: Dong Jin Kim, Jin Han Kim, Won Chul Do, Jae Hun Bae, Won Myoung Ki, Dong Hoon Han, Do Hyung Kim, Ji Hun Lee, Jun Hwan Park, Seung Nam Son, Hyun Cho, Curtis Zwenger
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Patent number: 10672699Abstract: A semiconductor device with redistribution layers on partial encapsulation is disclosed and may include providing a carrier with a non-photosensitive protection layer, forming a pattern in the non-photosensitive protection layer, providing a semiconductor die with a contact pad on a first surface, and bonding the semiconductor die to the non-photosensitive protection layer such that the contact pad aligns with the pattern formed in the non-photosensitive protection layer. A second surface opposite to the first surface of the semiconductor die, side surfaces between the first and second surfaces of the semiconductor die, and a portion of a first surface of the non-photosensitive protection layer may be encapsulated with an encapsulant. The carrier may be removed leaving the non-photosensitive protection layer bonded to the semiconductor die. A redistribution layer may be formed on the contact pad and a second surface of the non-photosensitive protection layer opposite to the first surface.Type: GrantFiled: January 29, 2019Date of Patent: June 2, 2020Assignee: AMKOR TECHNOLOGY, INC.Inventors: Jong Sik Paek, Jin Young Kim, YoonJoo Kim, Jin Han Kim, SeungJae Lee, Se Woong Cha, SungKyu Kim, Jae Hun Bae, Dong Jin Kim, Doo Hyun Park
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Publication number: 20200051944Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: ApplicationFiled: May 20, 2019Publication date: February 13, 2020Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
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Patent number: 10553451Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.Type: GrantFiled: June 25, 2018Date of Patent: February 4, 2020Assignee: Amkor Technology, Inc.Inventors: Dong Jin Kim, Jin Han Kim, Won Chul Do, Jae Hun Bae, Won Myoung Ki, Dong Hoon Han, Do Hyung Kim, Ji Hun Lee, Jun Hwan Park, Seung Nam Son, Hyun Cho, Curtis Zwenger
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Publication number: 20190229050Abstract: A semiconductor device with redistribution layers on partial encapsulation is disclosed and may include providing a carrier with a non-photosensitive protection layer, forming a pattern in the non-photosensitive protection layer, providing a semiconductor die with a contact pad on a first surface, and bonding the semiconductor die to the non-photosensitive protection layer such that the contact pad aligns with the pattern formed in the non-photosensitive protection layer. A second surface opposite to the first surface of the semiconductor die, side surfaces between the first and second surfaces of the semiconductor die, and a portion of a first surface of the non-photosensitive protection layer may be encapsulated with an encapsulant. The carrier may be removed leaving the non-photosensitive protection layer bonded to the semiconductor die. A redistribution layer may be formed on the contact pad and a second surface of the non-photosensitive protection layer opposite to the first surface.Type: ApplicationFiled: January 29, 2019Publication date: July 25, 2019Inventors: Jong Sik Paek, Jin Young Kim, YoonJoo Kim, Jin Han Kim, SeungJae Lee, Se Woong Cha, SungKyu Kim, Jae Hun Bae, Dong Jin Kim, Doo Hyun Park
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Patent number: 10340244Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: GrantFiled: December 19, 2017Date of Patent: July 2, 2019Assignee: AMKOR TECHNOLOGY, INC.Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
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Publication number: 20190066094Abstract: A smart multi-card capable of simultaneously using a plurality of card output schemes, and a payment method using the same. More specifically, a smart multi-card device capable of simultaneously using a plurality of card output schemes, according to one embodiment, includes a storage unit which stores one or more types of card information having individual card output schemes inputted by a user; and a plurality of sensors, wherein each of the plurality of sensors includes: a sensor unit which matches at least one type of card information of the one or more types of card information inputted by the user; and a control unit which performs control so that when the user touches a specific sensor of one or more sensors, card information matching the specific sensor is loaded, and a payment or accumulation is performed according to the card output scheme of the loaded card information.Type: ApplicationFiled: November 4, 2016Publication date: February 28, 2019Applicant: BRILLIANTTS CO., LTD.Inventors: Jae Hun BAE, Byung Chul JUNG
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Patent number: 10199322Abstract: A semiconductor device with a redistribution structure on partial encapsulation is disclosed and may include an electronic device having a top surface, a bottom surface, and side surfaces between the top and bottom surfaces of the electronic device. An encapsulant may encapsulate the side surfaces of the electronic device, a contact pad may be on the top surface of the electronic device, and a redistribution structure may be coupled to the contact pad. The redistribution structure may include a linear portion and a bump pad, and a conductive bump on the bump pad may include a main bump and a protruding part extending toward the linear portion, where the protruding part may be smaller than the main bump.Type: GrantFiled: November 14, 2017Date of Patent: February 5, 2019Assignee: AMKOR TECHNOLOGY, INC.Inventors: Jong Sik Paek, Jin Young Kim, YoonJoo Kim, Jin Han Kim, SeungJae Lee, Se Woong Cha, SungKyu Kim, Jae Hun Bae, Dong Jin Kim, Doo Hyun Park
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Publication number: 20180308712Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.Type: ApplicationFiled: June 25, 2018Publication date: October 25, 2018Inventors: Dong Jin Kim, Jin Han Kim, Won Chul Do Do, Jae Hun Bae Bae, Won Myoung Ki, Dong Hoon Han, Do Hyung Kim, Ji Hun Lee, Jun Hwan Park, Seung Nam Son, Hyun Cho, Curtis Zwenger
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Publication number: 20180211929Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: ApplicationFiled: December 19, 2017Publication date: July 26, 2018Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn