Patents by Inventor Jaehyeok YANG

Jaehyeok YANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240073081
    Abstract: Provided is a transmitting device for enlarging the size of a data eye of a transmission signal. The transmitting device includes an output driver including a plurality of driver circuits that drive a plurality of multi-level signals onto an output node, and a logic circuit configured to detect a direction of a pull-up or pull-down operation of each of the plurality of driver circuits by transitions of the plurality of driver control signals and generate pulse signals. The plurality of multi-level signals are driven based on a plurality of driver control signals and pulse signals, respectively, and the logic circuit provides a pulse signal to at least one static driver circuit connected to a driver control signal that does not transition, from among the plurality of driver circuits.
    Type: Application
    Filed: June 1, 2023
    Publication date: February 29, 2024
    Inventors: Seongyeal Yang, Moonchul Choi, Sungyong Cho, Jaehyeok Baek
  • Patent number: 9189012
    Abstract: Disclosed are various exemplary embodiments of a clock recovery apparatus for recovering clock signals of multiple data channels. In one exemplary embodiment a clock recovery apparatus for a plurality of data channels may include a plurality of channel blocks, where each channel block may include a frequency detection block configured to generate an intermediate signal based on a respective data signal received from a respective data channel and a global signal, and a recovery block configured to recover a clock signal for the respective data channel in response to the respective data signal and the global signal. The apparatus may also include a global signal generation block configured to receive and combine the intermediate signals from the plurality of channel blocks to generate the global signal.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: November 17, 2015
    Assignee: Terasquare Co. Ltd.
    Inventors: Jaehyeok Yang, Jinho Han, Byungkuk Yoon, Hyeonmin Bae, Jinho Park, Taeho Kim
  • Publication number: 20130262909
    Abstract: Disclosed are various exemplary embodiments of a clock recovery apparatus for recovering clock signals of multiple data channels. In one exemplary embodiment a clock recovery apparatus for a plurality of data channels may include a plurality of channel blocks, where each channel block may include a frequency detection block configured to generate an intermediate signal based on a respective data signal received from a respective data channel and a global signal, and a recovery block configured to recover a clock signal for the respective data channel in response to the respective data signal and the global signal. The apparatus may also include a global signal generation block configured to receive and combine the intermediate signals from the plurality of channel blocks to generate the global signal.
    Type: Application
    Filed: March 14, 2013
    Publication date: October 3, 2013
    Applicants: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, Terasquare Co., Ltd.
    Inventors: Jaehyeok YANG, Jinho HAN, Byungkuk YOON, Hyeonmin BAE, Jinho PARK, Taeho KIM