Patents by Inventor Jae-Ran JANG

Jae-Ran JANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11769769
    Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gate line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: September 26, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwi-Chan Jun, Heon-jong Shin, In-chan Hwang, Jae-ran Jang
  • Publication number: 20230207654
    Abstract: A semiconductor device includes an active pattern that extends in a first direction; a plurality of gate structures that are spaced apart in the first direction, and include a gate electrode that extends in a second direction; a source/drain recess between adjacent gate structures; a source/drain pattern in the source/drain recess; a source/drain contact connected to the source/drain pattern and that includes a lower part on the source/drain pattern and an upper par; and a contact silicide film disposed along the lower part of the source/drain contact and between the source/drain contact and the source/drain region. The source/drain pattern includes a semiconductor liner film that extends along the source/drain recess and includes silicon germanium, a semiconductor filling film on the semiconductor liner film and that includes silicon germanium, and a semiconductor insertion film that extends along side walls of the lower part of the source/drain contact and includes silicon germanium.
    Type: Application
    Filed: November 11, 2022
    Publication date: June 29, 2023
    Inventors: DOO HYUN LEE, Heon Jong Shin, Hyun Ho Park, Seon-Bae Kim, Jin Young Park, Jae Ran Jang
  • Publication number: 20220208966
    Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gate line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.
    Type: Application
    Filed: March 21, 2022
    Publication date: June 30, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwi-Chan JUN, Heon-jong Shin, In-Chan Hwang, Jae-ran Jang
  • Patent number: 11316010
    Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gale line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: April 26, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwi-Chan Jun, Heon-jong Shin, In-chan Hwang, Jae-ran Jang
  • Publication number: 20220102491
    Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gale line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.
    Type: Application
    Filed: September 30, 2020
    Publication date: March 31, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwi-Chan JUN, Heon-jong SHIN, In-chan HWANG, Jae-ran JANG
  • Patent number: 10879239
    Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gale line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: December 29, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwi-Chan Jun, Heon-jong Shin, In-chan Hwang, Jae-ran Jang
  • Publication number: 20200350312
    Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gale line. An insulating cover extends parallel to the substrate with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.
    Type: Application
    Filed: July 22, 2020
    Publication date: November 5, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwi-Chan Jun, Heon-jong Shin, In-chan Hwang, Jae-ran Jang
  • Patent number: 10763256
    Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gate line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: September 1, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwi-chan Jun, Heon-jong Shin, In-chan Hwang, Jae-ran Jang
  • Publication number: 20200235096
    Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gate line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.
    Type: Application
    Filed: April 3, 2020
    Publication date: July 23, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwi-chan JUN, Heon-jong SHIN, In-chan HWANG, Jae-ran JANG
  • Patent number: 10665588
    Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gate line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: May 26, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwi-chan Jun, Heon-jong Shin, In-chan Hwang, Jae-ran Jang
  • Publication number: 20200066856
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device, the semiconductor device including a substrate including an active fin extending in a first direction; a gate structure extending in a second direction to intersect the active fin; a source/drain region on the active fin; a metal silicide layer on the source/drain region; a filling insulating portion on the metal silicide layer, the filling insulating portion having a contact hole connected to a portion of the metal silicide layer; a protective barrier layer between the metal silicide layer and the filing insulating portion; and a contact plug in the contact hole and electrically connected to the portion of the metal silicide layer.
    Type: Application
    Filed: April 17, 2019
    Publication date: February 27, 2020
    Inventors: Hyun Seung SONG, Doo Hyun LEE, Yun Il LEE, Jae Ran JANG
  • Publication number: 20180261596
    Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gate line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.
    Type: Application
    Filed: November 9, 2017
    Publication date: September 13, 2018
    Inventors: Hwi-chan JUN, Heon-jong SHIN, In-chan HWANG, Jae-ran JANG
  • Patent number: 9812552
    Abstract: Methods of forming a semiconductor device are provided. The methods may include forming a gate structure on a substrate, forming a first sacrificial pattern and a second sacrificial pattern on opposing sides of the gate structure respectively and partially replacing the first sacrificial pattern with a first insulating pattern such that a portion of the first sacrificial pattern remains in the first insulating pattern and replacing the second sacrificial pattern with a second insulating pattern. The methods may also include replacing at least some of the portion of the first sacrificial pattern that remains in the first insulating pattern with a conductive pattern.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: November 7, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwi-Chan Jun, Heon-Jong Shin, Jae-Ran Jang
  • Publication number: 20160181399
    Abstract: Methods of forming a semiconductor device are provided. The methods may include forming a gate structure on a substrate, forming a first sacrificial pattern and a second sacrificial pattern on opposing sides of the gate structure respectively and partially replacing the first sacrificial pattern with a first insulating pattern such that a portion of the first sacrificial pattern remains in the first insulating pattern and replacing the second sacrificial pattern with a second insulating pattern. The methods may also include replacing at least some of the portion of the first sacrificial pattern that remains in the first insulating pattern with a conductive pattern.
    Type: Application
    Filed: April 6, 2015
    Publication date: June 23, 2016
    Inventors: Hwi-Chan JUN, Heon-Jong SHIN, Jae-Ran JANG