Abstract: According to a CMOS image device and a method of manufacturing same, dark current is decreased by a local impurity region. The image device includes a semiconductor substrate, and a transfer gate formed on a predetermined portion of the semiconductor substrate and electrically insulated from the semiconductor substrate. A photodiode is formed in the semiconductor substrate on one side of the transfer gate, and a floating diffusion region is formed on the semiconductor substrate in the other side of the transfer gate. A local impurity region of a first conductivity type is formed to be partially overlapped the transfer gate between the photodiode and the floating diffusion region.

Abstract: Provided are a CMOS image sensor and a method of manufacturing the same. The CMOS image sensor includes a semiconductor substrate having photodiodes and transistors. An interlayer insulating layer is formed on the resultant structure having the photodiodes and transistors, and light blocking patterns are formed on the interlayer insulating layer to surround the peripheries of the photodiodes.

Abstract: According to a CMOS image device and a method of manufacturing same, dark current is decreased by a local impurity region. The image device includes a semiconductor substrate, and a transfer gate formed on a predetermined portion of the semiconductor substrate and electrically insulated from the semiconductor substrate. A photodiode is formed in the semiconductor substrate on one side of the transfer gate, and a floating diffusion region is formed on the semiconductor substrate in the other side of the transfer gate. A local impurity region of a first conductivity type is formed to be partially overlapped the transfer gate between the photodiode and the floating diffusion region.

Abstract: According to a CMOS image device and a method of manufacturing same, dark current is decreased by a local impurity region. The image device includes a semiconductor substrate, and a transfer gate formed on a predetermined portion of the semiconductor substrate and electrically insulated from the semiconductor substrate. A photodiode is formed in the semiconductor substrate on one side of the transfer gate, and a floating diffusion region is formed on the semiconductor substrate in the other side of the transfer gate. A local impurity region of a first conductivity type is formed to be partially overlapped the transfer gate between the photodiode and the floating diffusion region.

Abstract: A horizontal charge coupled device (CCD) driving circuit, a solid-state image-sensing device having the same, and a method of driving the solid-state image-sensing device, transmits image signals using horizontal driving signals having a middle voltage during rising and falling of the horizontal signals. The middle voltage of the horizontal driving signals is generated when an equipotential switch is turned “on” while the output nodes of buffer circuits are in a floating state.

Abstract: An image sensor and method thereof. In an example, the image sensor, may include a pixel array including a plurality of unit pixels, each of the plurality of unit pixels having a charge transfer unit for transferring charges accumulated in an optoelectronic converter to a charge detector via a charge transfer driving signal. The example image sensor may further include a row driving unit generating a boosted voltage, the boosted voltage set to a boosted voltage level higher than a power voltage level, the boosted voltage selectively boosted in response to a boosting voltage variable control signal. The row driving unit may selectively apply the charge transfer driving signal to the pixel array. In another example, the method may include selectively adjusting a voltage level of a charge transfer driving voltage and transferring the charge transfer driving voltage to a charge transfer unit for controlling an operation of the charge transfer unit.

Abstract: Provided are a complementary metal oxide semiconductor (CMOS) image sensor and a method of fabricating the same, where the CMOS image sensor includes a photodiode, a drive transistor, a reset transistor, and a selection transistor; the drive transistor includes a threshold voltage adjustment region doped with impurities of a type substantially identical to that of impurities doped into a source and a drain of the drive transistor; and the CMOS image sensor includes pixels with expanded output signal ranges.

Abstract: Provided is an image pick-up semiconductor device capable of testing operating characteristics of an analog-digital converter while the image pick-up semiconductor device operates. The device includes an active pixel sensor array having a plurality of pixels converting optical signals input from an external source into electrical signals, a columnar analog-digital converter converting signals output from the active pixel sensor array into first digital data, and a test analog-digital converter receiving two external signals and converting a voltage difference between the two external signals into second digital data.

Abstract: A CMOS image capture device includes an array of pixel elements configured to convert an image received as light at a surface thereof into analog output signals. An image processing circuit is also provided. The image processing circuit is configured to generate digital output signals from which the image can be recreated in response to the analog output signals. The image processing circuit has self-adjustable gain characteristics. The image processing circuit includes a ramp signal generator having an integration circuit therein with an adjustable RC time constant. The integration circuit includes an operational amplifier and a resistor array and/or a capacitor array electrically coupled to the operational amplifier. This resistor array and/or capacitor array enables the adjustable RC time constant.

Abstract: An image sensor and method thereof. In an example, the image sensor, may include a pixel array including a plurality of unit pixels, each of the plurality of unit pixels having a charge transfer unit for transferring charges accumulated in an optoelectronic converter to a charge detector via a charge transfer driving signal. The example image sensor may further include a row driving unit generating a boosted voltage, the boosted voltage set to a boosted voltage level higher than a power voltage level, the boosted voltage selectively boosted in response to a boosting voltage variable control signal. The row driving unit may selectively apply the charge transfer driving signal to the pixel array. In another example, the method may include selectively adjusting a voltage level of a charge transfer driving voltage and transferring the charge transfer driving voltage to a charge transfer unit for controlling an operation of the charge transfer unit.

Abstract: Provided are a complementary metal oxide semiconductor (CMOS) image sensor including two types of device isolation regions and a method of fabricating the same.

Abstract: According to a CMOS image device and a method of manufacturing same, dark current is decreased by a local impurity region. The image device includes a semiconductor substrate, and a transfer gate formed on a predetermined portion of the semiconductor substrate and electrically insulated from the semiconductor substrate. A photodiode is formed in the semiconductor substrate on one side of the transfer gate, and a floating diffusion region is formed on the semiconductor substrate in the other side of the transfer gate. A local impurity region of a first conductivity type is formed to be partially overlapped the transfer gate between the photodiode and the floating diffusion region.

Abstract: Provided are a CMOS image sensor and a method of manufacturing the same. The CMOS image sensor includes a semiconductor substrate having photodiodes and transistors. An interlayer insulating layer is formed on the resultant structure having the photodiodes and transistors, and light blocking patterns are formed on the interlayer insulating layer to surround the peripheries of the photodiodes.

Abstract: Provided are a complementary metal oxide semiconductor (CMOS) image sensor and a method of fabricating the same, where the CMOS image sensor includes a photodiode, a drive transistor, a reset transistor, and a selection transistor; the drive transistor includes a threshold voltage adjustment region doped with impurities of a type substantially identical to that of impurities doped into a source and a drain of the drive transistor; and the CMOS image sensor includes pixels with expanded output signal ranges.

Abstract: Provided is an image pick-up semiconductor device capable of testing operating characteristics of an analog-digital converter while the image pick-up semiconductor device operates. The device includes an active pixel sensor array having a plurality of pixels converting optical signals input from an external source into electrical signals, a columnar analog-digital converter converting signals output from the active pixel sensor array into first digital data, and a test analog-digital converter receiving two external signals and converting a voltage difference between the two external signals into second digital data.

Abstract: In one aspect, an imaging device is provided which includes first and second semiconductor chips and a digital interface. The first semiconductor chip includes an active pixel sensor, a digital input/output, and a plurality of control circuits, where transistors of the active pixel sensor are all n-type or p-type transistors, and where at least one of the controls circuits operates under control of a timing signal externally input to the digital input/output. The second semiconductor chip includes a timing generator which supplies the timing signal to the digital input/output of the first semiconductor chip. The digital interface is operatively connected between the digital input/output of first semiconductor chip and the second semiconductor chip.

Abstract: Low-power and low-noise CDS (correlated double sampling) comparators for use with a CIS (CMOS image sensor) device are provided. A CDS comparator is constructed using one of various low-power inverters that provide decreased instantaneous transition currents at a logic threshold voltage. The use of such low-power inverters in CDS comparators enables a significant reduction in power consumption and noise in the CIS device, or other devices that implement such CDS comparators and/or inverters.

Abstract: A horizontal charge coupled device (CCD) driving circuit, a solid-state image-sensing device having the same, and a method of driving the solid-state image-sensing device, transmits image signals using horizontal driving signals having a middle voltage during rising and falling of the horizontal signals. The middle voltage of the horizontal driving signals is generated when an equipotential switch is turned “on” while the output nodes of buffer circuits are in a floating state.

Abstract: A biasing circuit for a charge-coupled device (CCD) includes one or more transistors and a nonvolatile memory cell connected in series between a first electric potential node and a second electric potential node and configured to produce a bias voltage at a node between the nonvolatile memory and one of the one or more transistors. The one or more transistors may include one or more transistors coupled in series between a first terminal of the nonvolatile memory cell and the first electric potential node, and one or more transistors coupled in series between a second terminal of the nonvolatile memory cell and the second electric potential node. The nonvolatile memory cell may include a flash memory cell, e.g., a stacked-gate-type flash memory cell and/or a split-gate-type flash memory cell.

Abstract: A signal converter, for converting signal charge into a voltage, comprises a first driver FET for a first stage that receives the signal charge. A subsequent driver FET is coupled to an output of the first driver FET, and a gate dielectric thickness of the subsequent driver FET is decreased. The subsequent driver FET is either for a second stage or for a third stage. The decrease of the gate dielectric thickness for the subsequent driver FET increases the voltage gain AVtotal without decreasing the charge transfer efficiency such that the overall sensitivity of the signal converter is enhanced.