Abstract: An electronic price indicator according to an embodiment includes a display displaying product information, an NFC module configured to communicate with a user terminal, a Bluetooth module configured to communicate with the user terminal, and a processor configured to control the display to display the product information received from the user terminal through the Bluetooth module. The processor is further configured to release a sleep mode when receiving an interrupt from the user terminal through the NFC module, and perform Bluetooth communication with the user terminal by initiating a scan for a predetermined period of time to receive an advertising signal from the user terminal.

Abstract: The disclosed technology generally relates to a barrier layer comprising titanium silicon nitride, and more particularly to a barrier layer for nonvolatile memory devices, and methods of forming the same. In one aspect, a method of forming an electrode for a phase change memory device comprises forming over a semiconductor substrate an electrode comprising titanium silicon nitride (TiSiN) on a phase change storage element configured to store a memory state. Forming the electrode comprises exposing a semiconductor substrate to one or more cyclical vapor deposition cycles, wherein a plurality of the cyclical vapor deposition cycles comprises an exposure to a Ti precursor, an exposure to a N precursor and an exposure to a Si precursor.

Abstract: The disclosed technology generally relates to forming a titanium nitride-based thin films, and more particularly to a conformal and smooth titanium nitride-based thin films and methods of forming the same. In one aspect, a method of forming a thin film comprising one or both of TiSiN or TiAlN comprises exposing a semiconductor substrate to one or more vapor deposition cycles at a pressure in a reaction chamber greater than 1 torr, wherein a plurality of the vapor deposition cycles comprises an exposure to a titanium (Ti) precursor, an exposure to a nitrogen (N) precursor and an exposure to one or both of a silicon (Si) precursor or an aluminum (Al) precursor.

Abstract: The disclosed technology generally relates to forming a titanium nitride-based thin films, and more particularly to a conformal and smooth titanium nitride-based thin films and methods of forming the same. In one aspect, a method of forming a thin film comprising one or both of TiSiN or TiAlN comprises exposing a semiconductor substrate to one or more vapor deposition cycles at a pressure in a reaction chamber greater than 1 torr, wherein a plurality of the vapor deposition cycles comprises an exposure to a titanium (Ti) precursor, an exposure to a nitrogen (N) precursor and an exposure to one or both of a silicon (Si) precursor or an aluminum (Al) precursor.

Abstract: The disclosed technology generally relates to a barrier layer comprising titanium silicon nitride, and more particularly to a barrier layer for nonvolatile memory devices, and methods of forming the same. In one aspect, a method of forming an electrode for a phase change memory device comprises forming over a semiconductor substrate an electrode comprising titanium silicon nitride (TiSiN) on a phase change storage element configured to store a memory state. Forming the electrode comprises exposing a semiconductor substrate to one or more cyclical vapor deposition cycles, wherein a plurality of the cyclical vapor deposition cycles comprises an exposure to a Ti precursor, an exposure to a N precursor and an exposure to a Si precursor.

Abstract: The disclosed technology generally relates to forming a titanium nitride-based thin films, and more particularly to a conformal and smooth titanium nitride-based thin films and methods of forming the same. In one aspect, a method of forming a thin film comprising one or both of TiSiN or TiAlN comprises exposing a semiconductor substrate to one or more vapor deposition cycles at a pressure in a reaction chamber greater than 1 torr, wherein a plurality of the vapor deposition cycles comprises an exposure to a titanium (Ti) precursor, an exposure to a nitrogen (N) precursor and an exposure to one or both of a silicon (Si) precursor or an aluminum (Al) precursor.

Abstract: A thin film transistor for increasing the conductivity of a channel region and suppressing the leakage current of a back channel region, and a display device including the thin film transistor, are discussed. According to an embodiment, the thin film transistor includes a gate electrode arranged on a substrate, a source electrode and a drain electrode spaced from each other on the substrate, a gate insulating film to insulate the gate electrode from the source electrode and the drain electrode, and a semiconductor layer insulated from the gate electrode through the gate insulating film, the semiconductor layer including a channel region and a back channel region, the semiconductor layer made of (In2O3)x(Ga2O3)y(ZnO)z(0?x?5, 0?y?5, 0?z?5), wherein X or Z is greater than Y in the channel region of the semiconductor layer, and Y is greater than X and Z in the back channel region of the semiconductor layer.

Abstract: An array substrate for a liquid crystal display device includes: a gate line and a gate electrode on a substrate, the gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode, the gate insulating layer including an organic insulating material such that a radical of carbon chain has a composition ratio of about 8% to about 11% by weight; a semiconductor layer on the gate insulating layer over the gate electrode; a data line crossing the gate line to define a pixel region; source and drain electrodes on the semiconductor layer, the source electrode connected to the data line and the drain electrode spaced apart from the source electrode; a passivation layer on the data line, the source electrode and the drain electrode, the passivation layer having a drain contact hole exposing the drain electrode; and a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the drain contact hole.

Abstract: A thin film transistor (TFT) array substrate and a method for fabricating the thin film transistor (TFT) array substrate is disclosed, wherein a passivation layer is directly subjected to exposing and patterning processes without using any photoresist, thereby simplifying the fabrication process and ensuring reduced preparation costs.

Abstract: A method for fabricating a thin film transistor (TFT) on a substrate includes forming a gate electrode; forming a semiconductor layer being insulated from the gate electrode and partially overlapped with the gate electrode; sequentially forming first and second gate insulating layers between the gate electrode and the semiconductor layer, wherein the first gate insulating layer is formed of a material different from the second gate insulating layer and at least one of the first and second gate insulating layers includes a sol-compound; and forming source and drain electrodes at both sides of the semiconductor layer.

Abstract: A method for fabricating a TFT on a substrate includes forming a gate electrode; forming a semiconductor layer insulated from the gate electrode and partially overlapped with the gate electrode; forming a gate insulating layer between the gate electrode and the semiconductor layer, the gate insulating layer including a sol-gel compound; and forming source and drain electrodes at both sides of the semiconductor layer.

Abstract: A thin film transistor (TFT) array substrate and a method for fabricating the thin film transistor (TFT) array substrate is disclosed, wherein a passivation layer is directly subjected to exposing and patterning processes without using any photoresist, thereby simplifying the fabrication process and ensuring reduced preparation costs.

Abstract: An array substrate for a liquid crystal display device includes: a gate line and a gate electrode on a substrate, the gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode, the gate insulating layer including an organic insulating material such that a radical of carbon chain has a composition ratio of about 8% to about 11% by weight; a semiconductor layer on the gate insulating layer over the gate electrode; a data line crossing the gate line to define a pixel region; source and drain electrodes on the semiconductor layer, the source electrode connected to the data line and the drain electrode spaced apart from the source electrode; a passivation layer on the data line, the source electrode and the drain electrode, the passivation layer having a drain contact hole exposing the drain electrode; and a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the drain contact hole

Abstract: An array substrate for a liquid crystal display device includes: a gate line and a gate electrode on a substrate, the gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode, the gate insulating layer including an organic insulating material such that a radical of carbon chain has a composition ratio of about 8% to about 11% by weight; a semiconductor layer on the gate insulating layer over the gate electrode; a data line crossing the gate line to define a pixel region; source and drain electrodes on the semiconductor layer, the source electrode connected to the data line and the drain electrode spaced apart from the source electrode; a passivation layer on the data line, the source electrode and the drain electrode, the passivation layer having a drain contact hole exposing the drain electrode; and a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the drain contact hole.

Abstract: A thin film transistor (TFT) array substrate and a method for fabricating the thin film transistor (TFT) array substrate is disclosed, wherein a passivation layer is directly subjected to exposing and patterning processes without using any photoresist, thereby simplifying the fabrication process and ensuring reduced preparation costs.

Abstract: A thin film transistor for increasing the conductivity of a channel region and suppressing the leakage current of a back channel region, and a display device including the thin film transistor, are discussed. According to an embodiment, the thin film transistor includes a gate electrode arranged on a substrate, a source electrode and a drain electrode spaced from each other on the substrate, a gate insulating film to insulate the gate electrode from the source electrode and the drain electrode, and a semiconductor layer insulated from the gate electrode through the gate insulating film, the semiconductor layer including a channel region and a back channel region, the semiconductor layer made of (In2O3)x(Ga2O3)y(ZnO)z(0?x?5, 0?y?5, 0?z?5), wherein X or Z is greater than Y in the channel region of the semiconductor layer, and Y is greater than X and Z in the back channel region of the semiconductor layer.

Abstract: An array substrate for a display device includes: a substrate; a gate electrode on the substrate; a gate insulating layer on the gate electrode, the gate insulating layer having an organic-inorganic hybrid material; a semiconductor layer on the gate insulating layer over the gate electrode; source and drain electrodes spaced apart from each other on the semiconductor layer; a passivation layer on the source and drain electrodes, the passivation layer having a drain contact hole exposing the drain electrode; and a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the drain contact hole.

Abstract: A method for fabricating a TFT on a substrate includes forming a gate electrode; forming a semiconductor layer insulated from the gate electrode and partially overlapped with the gate electrode; forming a gate insulating layer between the gate electrode and the semiconductor layer, the gate insulating layer including a sol-gel compound; and forming source and drain electrodes at both sides of the semiconductor layer.

Abstract: A method for fabricating a thin film transistor (TFT) on a substrate includes forming a gate electrode; forming a semiconductor layer being insulated from the gate electrode and partially overlapped with the gate electrode; sequentially forming first and second gate insulating layers between the gate electrode and the semiconductor layer, wherein the first gate insulating layer is formed of a material different from the second gate insulating layer and at least one of the first and second gate insulating layers includes a sol-compound; and forming source and drain electrodes at both sides of the semiconductor layer.

Abstract: A method for fabricating a TFT on a substrate includes forming a gate electrode; forming a semiconductor layer insulated from the gate electrode and partially overlapped with the gate electrode; forming a gate insulating layer between the gate electrode and the semiconductor layer, the gate insulating layer including a sol-gel compound; and forming source and drain electrodes at both sides of the semiconductor layer.