Abstract: A method of forming a thin film including zirconium titanium oxide including introducing a reactant including a mixture of a zirconium precursor and a titanium precursor onto a substrate, and introducing an oxidizing agent onto the substrate to form a solid material including zirconium titanium oxide on the substrate is provided. The thin film may be applied to a gate insulation layer of the gate structure, a dielectric layer of the capacitor or a flash memory device, and methods of forming the same are provided.

Abstract: A multi-layer film for a thin film structure, a capacitor using the multi-layer film and methods for fabricating the multi-layer film and the capacitor, the multi-layer film including a composition transition layer between a lower material layer and an upper material layer respectively formed of different elements whose interaction parameters are different from each other, the composition transition layer containing both elements of the lower and upper material layers, the concentration of the composition transition layer gradually varying from the portion of the composition transition layer contacting with the lower material layer to the portion of the composition transition layer contacting with the upper material layer such that the concentration of the element of the upper material layer is relatively large in its portion adjacent to the upper material layer, each of the lower and upper material layers being formed of an oxide or nitride material of aluminum, silicon, zirconium, cerium, titanium, yttrium,

Abstract: A conductive contact plug extends through an opening in the dielectric layer to contact the substrate and includes a widened pad portion extending onto the dielectric layer adjacent the opening. An ohmic pattern is disposed on the pad portion of the plug, and a barrier pattern is disposed on the ohmic pattern. A concave first capacitor electrode is disposed on the barrier pattern and defines a cavity opening away from the substrate. A capacitor dielectric layer conforms to a surface of the first capacitor electrode and a second capacitor electrode is disposed on the capacitor dielectric layer opposite the first capacitor electrode. Sidewalls of the ohmic pattern, the barrier pattern and the pad portion of the contact plug may be substantially coplanar, and the device may further include an etch stopper layer conforming to at least sidewalls of the ohmic pattern, the barrier pattern and the pad portion of the contact plug. Related fabrication methods are described.

Abstract: Methods of forming MIM comprise forming a lower electrode on a semiconductor substrate, forming a lower dielectric layer on the lower electrode, and forming an upper dielectric layer on the lower dielectric layer. The lower dielectric layer may be formed of dielectrics having larger energy band gap than that of the upper dielectric layer. An upper electrode is formed on the upper dielectric layer. The upper electrode may be formed of a metal layer having a higher work function than that of the lower electrode.

Abstract: A conductive contact plug extends through an opening in the dielectric layer to contact the substrate and includes a widened pad portion extending onto the dielectric layer adjacent the opening. An ohmic pattern is disposed on the pad portion of the plug, and a barrier pattern is disposed on the ohmic pattern. A concave first capacitor electrode is disposed on the barrier pattern and defines a cavity opening away from the substrate. A capacitor dielectric layer conforms to a surface of the first capacitor electrode and a second capacitor electrode is disposed on the capacitor dielectric layer opposite the first capacitor electrode. Sidewalls of the ohmic pattern, the barrier pattern and the pad portion of the contact plug may be substantially coplanar, and the device may further include an etch stopper layer conforming to at least sidewalls of the ohmic pattern, the barrier pattern and the pad portion of the contact plug. Related fabrication methods are described.

Abstract: Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the first layer opposite to the substrate. A mask is formed that has an opening on top of the first and second layers. A first trench is formed by removing a portion of the first and second layers through the opening in the mask. A portion of the first layer under the second layer is removed to form an undercut region under the second layer. An insulating layer collar is formed in the undercut region under the second layer. A second trench is formed that extends from the first trench by removing a portion of the substrate through the opening in the mask. A buried plate is formed in the substrate along the second trench. A dielectric layer is formed on an inner wall and bottom of the second trench.

Abstract: Methods for forming a capacitor using an atomic layer deposition process include providing a reactant including an aluminum precursor onto a substrate to chemisorb a portion of the reactant to a surface of the substrate. The substrate has an underlying structure including a lower electrode. An ammonia (NH3) plasma is provided onto the substrate to form a dielectric layer including aluminum nitride on the substrate including the lower electrode. An upper electrode is formed on the dielectric layer.

Abstract: Liquid chemical delivery systems are provided which include a liquid chemical storage canister, a pressurized gas source that feeds a pressurized gas into the storage canister, a vaporizer that may be used to vaporize the liquid chemical supplied from the storage canister, a delivery line that connects the storage canister to the vaporizer, a liquid mass flow controller that controls the flow rate of the liquid chemical through the delivery line, a reaction chamber that is connected to the vaporizer, and a liquid chemical recycling element that collects at least some of the chemical flowing through the system during periods when the liquid chemical delivery system is isolated from the reaction chamber.

Abstract: Multi-layered structures formed using atomic-layer deposition processes include multiple metal oxide layers wherein the metal oxide layers are formed without the presence of interlayer oxide layers and may include different metal oxide compositions.

Abstract: A method of forming a high dielectric film using atomic layer deposition (ALD), and a method of manufacturing a capacitor having the high dielectric film, include supplying a precursor containing a metal element to a semiconductor substrate and purging a reactor; supplying an oxidizer and purging the reactor; and supplying a reaction source containing nitrogen and purging the reactor.

Abstract: A conductive contact plug extends through an opening in the dielectric layer to contact the substrate and includes a widened pad portion extending onto the dielectric layer adjacent the opening. An ohmic pattern is disposed on the pad portion of the plug, and a barrier pattern is disposed on the ohmic pattern. A concave first capacitor electrode is disposed on the barrier pattern and defines a cavity opening away from the substrate. A capacitor dielectric layer conforms to a surface of the first capacitor electrode and a second capacitor electrode is disposed on the capacitor dielectric layer opposite the first capacitor electrode. Sidewalls of the ohmic pattern, the barrier pattern and the pad portion of the contact plug may be substantially coplanar, and the device may further include an etch stopper layer conforming to at least sidewalls of the ohmic pattern, the barrier pattern and the pad portion of the contact plug. Related fabrication methods are described.

Abstract: Methods of forming a capacitor on an integrated circuit include forming a lower electrode of the capacitor on an integrated circuit substrate. A protection layer is formed on the lower electrode at a temperature below a minimum temperature associated with a phase change of the lower electrode. A dielectric layer is formed on the protection layer. The protection layer is configured to limit oxidation of the lower electrode during forming of the dielectric layer. An upper electrode of the capacitor is formed on the dielectric layer.

Abstract: Methods of forming an electronic device include providing a fist electrode, providing a dielectric oxide layer on the first electrode, and providing a second electrode on the dielectric oxide layer so that the dielectric oxide layer is between the first and second electrodes. More particularly, a first portion of the dielectric oxide layer adjacent the first electrode can have a first density of titanium, and a second portion of the dielectric oxide layer opposite the first electrode can have a second density of titanium different than the first density. Related structures are also discussed.

Abstract: A multi-layer film for a thin film structure, a capacitor using the multi-layer film and methods for fabricating the multi-layer film and the capacitor, the multi-layer film including a composition transition layer between a lower material layer and an upper material layer respectively formed of different elements whose interaction parameters are different from each other, the composition transition layer containing both elements of the lower and upper material layers, the concentration of the composition transition layer gradually varying from the portion of the composition transition layer contacting with the lower material layer to the portion of the composition transition layer contacting with the upper material layer such that the concentration of the element of the upper material layer is relatively large in its portion adjacent to the upper material layer, each of the lower and upper material layers being formed of an oxide or nitride material of aluminum, silicon, zirconium, cerium, titanium, yttrium,

Abstract: A method for manufacturing a capacitor of a semiconductor device is provided. The method includes the steps of: forming a first electrode on a semiconductor substrate; forming a dielectric layer on the first electrode; forming a second electrode on the dielectric layer; first annealing the capacitor having the first electrode, the dielectric layer, and the second electrode under oxygen atmosphere; and second annealing the capacitor having the first electrode, the dielectric layer, and the second electrode under vacuum.

Abstract: In a method of forming a thin film using an atomic layer deposition (ALD) method, a thin film is formed on a substrate in cycles. Each cycle includes injecting a first reactant including an atom that forms the thin film and a ligand into a reaction chamber that includes the substrate, purging the first reactant, injecting a second reactant into the reaction chamber, and purging the second reactant. The thin film is formed by a chemical reaction between the atom that forms the thin film and a second reactant whose binding energy with respect to the atom that forms the thin film is larger than the binding energy of the ligand with respect to the atom that forms the thin film and the generation of by-products is prevented. The generation of a hydroxide by-product in the thin film is suppressed by using a material that does not include a hydroxide as the second reactant, purging the second reactant, and reacting the second reactant with a third reactant that includes hydroxide.

Abstract: A multi-layer film for a thin film structure, a capacitor using the multi-layer film and methods for fabricating the multi-layer film and the capacitor, the multi-layer film including a composition transition layer between a lower material layer and an upper material layer respectively formed of different elements whose interaction parameters are different from each other, the composition transition layer containing both elements of the lower and upper material layers, the concentration of the composition transition layer gradually varying from the portion of the composition transition layer contacting with the lower material layer to the portion of the composition transition layer contacting with the upper material layer such that the concentration of the element of the upper material layer is relatively large in its portion adjacent to the upper material layer, each of the lower and upper material layers being formed of an oxide or nitride material of aluminum, silicon, zirconium, cerium, titanium, yttrium,

Abstract: A method for manufacturing a capacitor of a semiconductor device is provided. The method includes the steps of: forming a first electrode on a semiconductor substrate; forming a dielectric layer on the first electrode; forming a second electrode on the dielectric layer; first annealing the capacitor having the first electrode, the dielectric layer, and the second electrode under oxygen atmosphere; and second annealing the capacitor having the first electrode, the dielectric layer, and the second electrode under vacuum.

Abstract: A semiconductor device includes a first electrode formed of a silicon-family material, a dielectric layer formed by sequentially supplying reactants on the first electrode, and a second electrode having a work function larger than that of the first electrode, with the second electrode being formed on the dielectric layer. The first electrode and the second electrode can be a lower electrode and an upper electrode, respectively, in a capacitor structure. Also, the first electrode and the second electrode can be a silicon substrate and a gate electrode, respectively, in a transistor structure. A stabilizing layer, which is, for example, a silicon oxide layer, a silicon nitride layer, or a composite layer of the silicon oxide layer and the silicon nitride layer, for facilitating the formation of the dielectric layer by hydrophilizing the surface of the first electrode, may be formed on the first electrode. The dielectric layer can be formed by an atomic layer deposition method.

Abstract: Methods of manufacturing integrated circuit capacitors include the steps of forming a first electrically insulating layer having an opening therein, on a semiconductor substrate and then forming an electrically conductive electrode layer on an upper surface of the first electrically insulating layer and on a sidewall of the opening within the first electrically insulating layer. The electrically conductive electrode layer is then covered with a second electrically insulating layer. The second electrically insulating layer and the electrically conductive electrode layer are then planarized to expose the upper surface of the first electrically insulating layer and define a capacitor electrode layer on the sidewall of the opening. The capacitor electrode layer is then selectively etched back to expose the sidewall of the opening and define a lower capacitor electrode that is recessed relative to the upper surface of the first electrically insulating layer.