Abstract: A shredded parallel stacked inductor is provided. The shredded parallel stacked inductor includes a substrate, an oxide film formed on the substrate, metallic layers spirally formed within the oxide film, and vias formed in regions of the metallic layers to join the metallic layers in parallel, thus forming a spiral cavity in a center part of the metallic layers.

Abstract: A small-sized on-chip complementary metal-oxide semiconductor (CMOS) Power Amplifier having improved efficiency is provided herein. The on-chip CMOS power amplifier is capable of improving efficiency and maximizing output thereof by enhancing a K factor, which may cause a problem in a power amplifier having a distributed active transformer structure. The on-chip CMOS power amplifier having an improved efficiency and being fabricated in a small size, the on-chip CMOS power amplifier includes a primary winding located at a first layer, secondary windings located at a second layer, which is an upper part of the first layer, the secondary windings being located corresponding to a position of the primary winding, and a cross section for coupling the second windings with each other.