Abstract: The semiconductor device includes a substrate having a cell area and a via area; a transistor and a logic interconnection disposed over the substrate; a lower insulating layer covering the transistor and the logic interconnection; a lower conductive layer on the lower insulating layer in the cell area; a support pattern disposed on the lower insulating layer in the via area; a lower via plug having a side surface in contact with the support pattern and a bottom surface in contact with the logic interconnection; a word line stack disposed on the lower conductive layer in the cell area; an dielectric layer stack disposed on the support pattern in the via area; a vertical channel pillar penetrating the word line stack to be connected to the lower conductive layer; and an upper via plug penetrating the dielectric layer stack to be vertically aligned with the lower via plug.

Abstract: There are provided a semiconductor memory device and a manufacturing method of the semiconductor memory device. The semiconductor memory device includes a stack structure including interlayer insulating layers conductive layers, which are alternately stacked therein; and a plurality of contact plugs formed vertically on the conductive layers. The stack structure is configured to have a stepped structure, and each of a plurality of steps included in the stepped structure includes at least two interlayer insulating layers, among the interlayer insulating layers, and at least two conductive layers, among the conductive layers. The plurality of contact plugs include at least two contact plugs respectively connected to the at least two conductive layers included in each of the plurality of steps.

Abstract: A video decoding method for decoding an input bitstream in which each of pictures has been encoded with being split into a plurality of tiles, the method includes decoding partial decoding information included in the input bitstream and determining one or more target tiles to be decoded among the plurality of tiles according to the partial decoding information; and decoding video data corresponding to the one or more target tiles, wherein the partial decoding information includes at least one of first information indicating whether to perform partial decoding and second information indicating an area on which partial decoding is to be performed.

Abstract: A display device includes a plurality of pixel electrodes on a substrate, light-emitting elements on the plurality of pixel electrodes and extending in a thickness direction of the substrate and connecting electrodes between the plurality of pixel electrodes and the light-emitting elements, wherein a width of the connecting electrodes is greater than a width of the light-emitting elements, and upper corners of each of the light-emitting elements and upper corners of each of the connecting electrodes are rounded.

Abstract: A video decoding method for decoding an input bitstream in which each of pictures has been encoded with being split into a plurality of tiles, the method includes decoding partial decoding information included in the input bitstream and determining one or more target tiles to be decoded among the plurality of tiles according to the partial decoding information; and decoding video data corresponding to the one or more target tiles, wherein the partial decoding information includes at least one of first information indicating whether to perform partial decoding and second information indicating an area on which partial decoding is to be performed.

Abstract: A video decoding method for decoding an input bitstream in which each of pictures has been encoded with being split into a plurality of tiles, the method includes decoding partial decoding information included in the input bitstream and determining one or more target tiles to be decoded among the plurality of tiles according to the partial decoding information; and decoding video data corresponding to the one or more target tiles, wherein the partial decoding information includes at least one of first information indicating whether to perform partial decoding and second information indicating an area on which partial decoding is to be performed.

Abstract: A video decoding method for decoding an input bitstream in which each of pictures has been encoded with being split into a plurality of tiles, the method includes decoding partial decoding information included in the input bitstream and determining one or more target tiles to be decoded among the plurality of tiles according to the partial decoding information; and decoding video data corresponding to the one or more target tiles, wherein the partial decoding information includes at least one of first information indicating whether to perform partial decoding and second information indicating an area on which partial decoding is to be performed.

Abstract: Proposed is a method of generating a map using an aviation LiDAR for effectively generating a 3D map using point cloud data acquired from the LiDAR installed in an aviation device. The method includes the steps of: receiving, by a map generation unit, point cloud data acquired from a LiDAR installed in an aviation device; projecting, by the map generation unit, a top-view of the received point cloud data; and generating a map, by the map generation unit, by scanning the projected point cloud data in a direction perpendicular to the ground.

Abstract: A semiconductor memory device, and a manufacturing method of the semiconductor memory device, includes a peripheral transistor, a first insulating layer covering the peripheral transistor, a source layer on the first insulating layer, and a stack structure on the source layer. The semiconductor memory device also includes a peripheral contact structure penetrating the stack structure and the source layer, the peripheral contact structure being electrically connected to the peripheral transistor. The stack structure includes a stepped structure including a step side surface and a step top surface. The peripheral contact structure is in contact with the step side surface.

Abstract: A video decoding apparatus decodes a sequence of one or more pictures in the unit of blocks which are split from each picture. The apparatus comprising a decoder configured to reconstruct, from a bitstream, a current motion vector difference of the current block among the blocks which belong to the sequence of one or more pictures, and an image decoder configured to predict and decode the current block using the motion vector of the current block. When the current motion vector difference of the current block is zero, the resolution of the current motion vector difference of the current block is set to the ¼ pixel precision without the information on the motion vector resolution extracted.

Abstract: A display device may include a display panel including first and second pixels respectively connected to first and second sensing lines, a sensing driver including a sensing channel shared by the first and the second sensing lines, and a controller configured to control the display panel and the sensing driver. The controller may be configured to, in a first time period, electrically disconnect the sensing channel from the first and the second sensing lines, and reflect electrical characteristics of the first and the second pixels in the first and the second sensing lines, respectively, as sensing voltages, and in a second time period, record the sensing voltages reflected in the first and the second sensing lines in the sensing channel by time-sharing.

Abstract: The present disclosure relates to a polycarbonate resin composition, and more particularly, to a polycarbonate resin composition containing 90 wt % to 99 wt % of a polycarbonate resin, 0.3 wt % to 0.7 wt % of an anthraquinone-based black dye, and 0.2 wt % to 1.0 wt % of an acrylic polymeric chain extender, and a molded article containing the same.

Abstract: Provided herein are a semiconductor memory device and a method of manufacturing the same. The semiconductor memory device includes a lower substrate, a peripheral circuit component located on the lower substrate, a lower bonding layer including a lower capacitor structure, the capacitor structure located on the peripheral circuit component, an upper bonding layer including an upper capacitor structure, the upper bonding layer bonded to the lower bonding layer, a plurality of cells and a dummy insulating layer that are located on the upper bonding layer, and an upper substrate being located on the plurality of cells and the dummy insulating layer, wherein the upper capacitor structure is coupled to the lower capacitor structure.

Abstract: A steroid sulfatase inhibitor provided by the present invention is a safe substance without toxicity and adverse effects, has inhibitory activity against various viruses, and thus is capable of effectively preventing, ameliorating, or treating viral infections or diseases caused by viral infections.

Abstract: The semiconductor device includes a substrate having a cell area and a via area; a transistor and a logic interconnection disposed over the substrate; a lower insulating layer covering the transistor and the logic interconnection; a lower conductive layer on the lower insulating layer in the cell area; a support pattern disposed on the lower insulating layer in the via area; a lower via plug having a side surface in contact with the support pattern and a bottom surface in contact with the logic interconnection; a word line stack disposed on the lower conductive layer in the cell area; an dielectric layer stack disposed on the support pattern in the via area; a vertical channel pillar penetrating the word line stack to be connected to the lower conductive layer; and an upper via plug penetrating the dielectric layer stack to be vertically aligned with the lower via plug.

Abstract: Disclosed herein is a method for decoding a video including determining a coding unit to be decoded by block partitioning, decoding prediction syntaxes for the coding unit, the prediction syntaxes including a skip flag indicating whether the coding unit is encoded in a skip mode, after the decoding of the prediction syntaxes, decoding transform syntaxes including a transformation/quantization skip flag and a coding unit cbf, wherein the transformation/quantization skip flag indicates whether inverse transformation, inverse quantization, and at least part of in-loop filterings are skipped, and the coding unit cbf indicates whether all coefficients in a luma block and two chroma blocks constituting the coding unit are zero, and reconstructing the coding unit based on the prediction syntaxes and the transform syntaxes.

Abstract: A semiconductor memory device, and a manufacturing method of the semiconductor memory device, includes a peripheral transistor, a first insulating layer covering the peripheral transistor, a source layer on the first insulating layer, and a stack structure on the source layer. The semiconductor memory device also includes a peripheral contact structure penetrating the stack structure and the source layer, the peripheral contact structure being electrically connected to the peripheral transistor. The stack structure includes a stepped structure including a step side surface and a step top surface. The peripheral contact structure is in contact with the step side surface.

Abstract: A semiconductor device includes: a first memory block having a first block pitch; and a second memory block belonging to a same plane as the first memory block, the second memory block located closer to a plane edge than the first memory block, the plane edge being an edge of the plane, wherein the second memory block has a second block pitch that is larger than the first block pitch.

Abstract: A semiconductor device includes a gate structure including word lines and select lines, the gate structure including a first pad stepped structure for exposing each of the select lines and a common pad structure for exposing the select lines. The semiconductor device also includes first contact plugs connected to the select lines through the first pad stepped structure, respectively. The semiconductor device further includes one or more common contact plugs connected in common to the select lines through the common pad structure.

Abstract: A semiconductor device includes a substrate, a source structure disposed on the substrate, and cell stack structures disposed on the source structure. The semiconductor device also includes a dummy stack structure disposed between the cell stack structures on the source structure and vertical barriers disposed between the dummy stack structure and the cell stack structures. The semiconductor device further includes at least one lower protective pattern disposed at a lower portion of the dummy stack structure between the vertical barriers.