Abstract: Proposed is a vagus nerve stimulator having at least two electrodes that are configured to be worn on at least one of the left and right ears and are configured to generate electrical stimulation on the vagus nerve in the auricle. The vagus nerve stimulator may include: a body part configured to be located on a side of a wearer's ear; a first electrode configured to be inserted into and make contact with the external acoustic meatus of the wearer's ear; a second electrode configured to make contact with the cymba concha of the wearer's ear; a first electrode fixing part protruding from the body part and having a first electrode at an end thereof; and a second electrode fixing part protruding from the body part and having a second electrode at an end thereof.

Abstract: A duty cycle correction circuit includes a duty correction circuit, an information generation circuit and a duty control circuit. The duty correction circuit corrects a duty rate of an input clock signal based on a duty control code to generate an output clock signal. The information generation circuit compares a difference between operation power voltages based on an operation mode to generate voltage information. The duty control circuit receives the voltage information from the information generation circuit and generates the duty control code that includes the voltage information based on a duty rate of the output clock signal.

Abstract: Provided is an apparatus and method for predicting the remaining lifetime of an environment data collection sensor in a livestock house. The method for predicting the remaining lifetime of an environment data collection sensor in a livestock house includes (a) collecting livestock house environment information, (b) detecting an error of a sensor from the collected livestock house environment information, (c) generating a dataset for learning, (d) generating a sensor lifetime prediction model to performing learning, and (e) predicting a lifetime of the sensor using a result of the learning.

Abstract: A video decoding method for decoding an input bitstream in which each of pictures has been encoded with being split into a plurality of tiles, the method includes decoding partial decoding information included in the input bitstream and determining one or more target tiles to be decoded among the plurality of tiles according to the partial decoding information; and decoding video data corresponding to the one or more target tiles, wherein the partial decoding information includes at least one of first information indicating whether to perform partial decoding and second information indicating an area on which partial decoding is to be performed.

Abstract: The chuck for supporting a target substrate for a display device, the chuck includes: a base having a first surface to support an object and a second surface opposite the first surface, the first surface including a first area and a second area; and indentations formed in the second area and recessed from the first area in a thickness direction of the base. The indentations include a first indentation extending in a first direction and a second indentation extending in a second direction intersecting the first direction.

Abstract: A luggage board for a vehicle includes a core layer; a first layer covering a portion of the core layer; and a second layer covering a remaining portion of the core layer except for a region covered by the first layer. End portions of the first layer and the second layer disposed on a side surface of the core layer are bonded to each other.

Abstract: A video decoding method for decoding an input bitstream in which each of pictures has been encoded with being split into a plurality of tiles, the method includes decoding partial decoding information included in the input bitstream and determining one or more target tiles to be decoded among the plurality of tiles according to the partial decoding information; and decoding video data corresponding to the one or more target tiles, wherein the partial decoding information includes at least one of first information indicating whether to perform partial decoding and second information indicating an area on which partial decoding is to be performed.

Abstract: A video decoding method for decoding an input bitstream in which each of pictures has been encoded with being split into a plurality of tiles, the method includes decoding partial decoding information included in the input bitstream and determining one or more target tiles to be decoded among the plurality of tiles according to the partial decoding information; and decoding video data corresponding to the one or more target tiles, wherein the partial decoding information includes at least one of first information indicating whether to perform partial decoding and second information indicating an area on which partial decoding is to be performed.

Abstract: A video decoding method for decoding an input bitstream in which each of pictures has been encoded with being split into a plurality of tiles, the method includes decoding partial decoding information included in the input bitstream and determining one or more target tiles to be decoded among the plurality of tiles according to the partial decoding information; and decoding video data corresponding to the one or more target tiles, wherein the partial decoding information includes at least one of first information indicating whether to perform partial decoding and second information indicating an area on which partial decoding is to be performed.

Abstract: The present invention relates to a three-dimensional structure electrode, a method for manufacturing same, and an electrochemical element including the electrode. The present invention is characterized by comprising: (a) an upper conductive layer and a lower conductive layer which have a structure constituting an assembly within which a conductive material and a porous nonwoven fabric including a plurality of polymeric fibers are three-dimensionally connected in an irregular and continuous manner, thereby forming a mutually connected porous structure; and (b) an active material layer forming the same assembly structure as the conductive layers and forming a three-dimensionally filled structure in which electrode active material particles are uniformly filled inside the mutually connected porous structure formed in the assembly structure, wherein the active material layer is formed between the upper conductive layer and the lower conductive layer.

Abstract: A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.

Abstract: The present disclosure relates to a thermoplastic polyurethane composition for injection molding and a method for manufacturing the same. Specifically, the thermoplastic polyurethane composition includes 0.5% by weight to 10.0% by weight of a sulfonate diol, 13% by weight to 60% by weight of an isocyanate, 30% by weight to 70% by weight of an ether-containing polyester polyol, and 5% by weight to 40% by weight of a chain extender.

Abstract: Disclosed are semiconductor devices, electronic systems including the same, and methods of fabricating the same. The semiconductor device comprises a first gate stack structure including a first dielectric pattern and a first conductive pattern that are alternately stacked with each other, a memory channel structure including a first memory portion that penetrates the first gate stack structure, a through contact including a first through portion at a level the same as a level of the first memory portion, and a connection contact including a first connection portion at a level the same as the level of the first memory portion and the level of the first through portion. A minimum width of the first memory portion is less than a minimum width of the first through portion and a minimum width of the first connection portion.

Abstract: A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.

Abstract: A method of controlling air conditioning for occupants through seating detection includes: determining whether an entire air conditioning condition is satisfied when an air conditioner is operated and performing air conditioning for the entire vehicle when the entire air conditioning condition is satisfied; detecting whether an occupant is seated on a rear seat and performing air conditioning for the entire vehicle when it is determined that the occupant is seated on the rear seat; detecting whether the occupant is seated on a front occupant seat when it is determined that the occupant is not seated on the rear seat; determining a heat load condition by comparing an outdoor air temperature and an interior temperature; and performing air conditioning control in consideration of whether the occupant is seated on the front occupant seat and the heat load condition.

Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.

Abstract: A method for manufacturing a gas diffusion layer for a fuel cell wherein carbon nanotubes are impregnated into Korean paper, thereby enhancing electroconductivity, and a gas diffusion layer manufactured thereby. The method for manufacturing a gas diffusion layer for a fuel cell which is to manufacture a gas diffusion layer as a constituent member of a unit cell in a fuel cell, includes a support preparation step of preparing a support with Korean paper; a dispersion preparation step of dispersing a carbon substance in a solvent to form a dispersion, a coating step of coating the support with the dispersion, and a thermal treatment step of thermally treating the dispersion-coated support to fix the carbon substance to the support.

Abstract: A method of reducing a concentration of a nitrogen oxide, the method comprising: contacting a microorganism with a nitrogen oxide-containing sample to reduce the concentration of the nitrogen oxide in the sample, wherein the contacting comprises contacting the microorganism with Fe(II)(L)-NOx in a bioreactor, wherein the Fe(II)(L)-NOx is a complex in which a chelating agent, Fe2+, and NOx are chelated, wherein L is the chelating agent, and wherein NOx is a nitrogen oxide ligand.

Abstract: A memory device, a host device and a memory system are provided. The memory device may include a plurality of storage units configured to store data, and at least one device controller configured to, receive a read command from at least one host device and to read data stored in the plurality of storage units in response to the read command, the at least one host device including at least one host memory including a plurality of HPB (high performance boosting) entry storage regions, and provide the at least one host device with a response command, the response command indicating an activation or deactivation of the plurality of HPB entry storage regions, the response command including HPB entry type information which indicates a HPB entry type of the HPB entry storage region.

Abstract: Provided is a display device, which includes: a reference voltage line formed along a circular outer line and configured to provide a reference voltage; a first reference voltage auxiliary line electrically connected to the reference voltage line and formed to be parallel with a predetermined interval; and a conductive line forming a contact with the reference voltage line and the first reference voltage auxiliary line and configured to provide the reference voltage to a cathode.