Patents by Inventor JAE-HYEOUNG MA

JAE-HYEOUNG MA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
    Publication number: 20230197719
    Abstract: A semiconductor device may include first channels on a first region of a substrate and spaced apart from each other in a vertical direction substantially perpendicular to an upper surface of the substrate, second channels on a second region of the substrate and spaced apart from each other in the vertical direction, a first gate structure on the first region of the substrate and covering at least a portion of a surface of each of the first channels, and a second gate structure on the second region of the substrate and covering at least a portion of a surface of each of the second channels. The second channels may be disposed at heights substantially the same as those of corresponding ones of the first channels, and a height of a lowermost one of the second channels may be greater than a height of a lowermost one of the first channels.
    Type: Application
    Filed: February 13, 2023
    Publication date: June 22, 2023
    Inventors: Chang-Woo Noh, Jae-Hyeoung Ma, Dong-Il Bae
  • Semiconductor devices having different numbers of stacked channels in different regions and methods of manufacturing the same
    Patent number: 11581312
    Abstract: A semiconductor device may include first channels on a first region of a substrate and spaced apart from each other in a vertical direction substantially perpendicular to an upper surface of the substrate, second channels on a second region of the substrate and spaced apart from each other in the vertical direction, a first gate structure on the first region of the substrate and covering at least a portion of a surface of each of the first channels, and a second gate structure on the second region of the substrate and covering at least a portion of a surface of each of the second channels. The second channels may be disposed at heights substantially the same as those of corresponding ones of the first channels, and a height of a lowermost one of the second channels may be greater than a height of a lowermost one of the first channels.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: February 14, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-Woo Noh, Jae-Hyeoung Ma, Dong-Îl Bae
  • SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
    Publication number: 20210167064
    Abstract: A semiconductor device may include first channels on a first region of a substrate and spaced apart from each other in a vertical direction substantially perpendicular to an upper surface of the substrate, second channels on a second region of the substrate and spaced apart from each other in the vertical direction, a first gate structure on the first region of the substrate and covering at least a portion of a surface of each of the first channels, and a second gate structure on the second region of the substrate and covering at least a portion of a surface of each of the second channels. The second channels may be disposed at heights substantially the same as those of corresponding ones of the first channels, and a height of a lowermost one of the second channels may be greater than a height of a lowermost one of the first channels.
    Type: Application
    Filed: February 11, 2021
    Publication date: June 3, 2021
    Inventors: CHANG-WOO NOH, JAE-HYEOUNG MA, DONG-IL BAE
  • Semiconductor devices having different numbers of stacked channels in different regions and methods of manufacturing the same
    Patent number: 10937787
    Abstract: A semiconductor device may include first channels on a first region of a substrate and spaced apart from each other in a vertical direction substantially perpendicular to an upper surface of the substrate, second channels on a second region of the substrate and spaced apart from each other in the vertical direction, a first gate structure on the first region of the substrate and covering at least a portion of a surface of each of the first channels, and a second gate structure on the second region of the substrate and covering at least a portion of a surface of each of the second channels. The second channels may be disposed at heights substantially the same as those of corresponding ones of the first channels, and a height of a lowermost one of the second channels may be greater than a height of a lowermost one of the first channels.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: March 2, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-Woo Noh, Jae-Hyeoung Ma, Dong-Il Bae
  • SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
    Publication number: 20200006333
    Abstract: A semiconductor device may include first channels on a first region of a substrate and spaced apart from each other in a vertical direction substantially perpendicular to an upper surface of the substrate, second channels on a second region of the substrate and spaced apart from each other in the vertical direction, a first gate structure on the first region of the substrate and covering at least a portion of a surface of each of the first channels, and a second gate structure on the second region of the substrate and covering at least a portion of a surface of each of the second channels. The second channels may be disposed at heights substantially the same as those of corresponding ones of the first channels, and a height of a lowermost one of the second channels may be greater than a height of a lowermost one of the first channels.
    Type: Application
    Filed: March 15, 2019
    Publication date: January 2, 2020
    Inventors: CHANG-WOO NOH, JAE-HYEOUNG MA, DONG-IL BAE