Patents by Inventor Jae-pil Shin
Jae-pil Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11945002Abstract: The present disclosure relates to an automatic metal sorting system using laser induced breakdown spectroscopy. The system may include: a conveyer configured to move waste metals at a constant speed; a shape measurer configured to measure a position and a shape of at least one waste metal on the conveyer; a laser induced breakdown spectroscopic device configured to determine the kind of the waste metal by emitting a laser to the waste metal and receiving and analyzing a plasma spectrum signal generated by the emitted laser; and a discharger configured to separate and discharge the waste metal in accordance with the determined kind of the waste metal.Type: GrantFiled: April 1, 2022Date of Patent: April 2, 2024Assignee: GIST(Gwangju Institute of Science and Technology)Inventors: Sung Ho Jeong, Sung Ho Shin, Young Min Moon, Jae Pil Lee
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Patent number: 11945864Abstract: A monoclonal antibody or an antigen-binding fragment thereof according to an embodiment of the present invention can bind to lymphocyte-activation gene 3 (LAG-3) including a heavy chain variable region and a light chain variable region and inhibit the activity thereof. Thus it is expected to be useful for the development of immunotherapeutic agents for various disorders that are associated with LAG-3.Type: GrantFiled: June 28, 2019Date of Patent: April 2, 2024Assignee: Y-BIOLOGICS INC.Inventors: Sang Pil Lee, Ji-Young Shin, Sunha Yoon, Yunseon Choi, Jae Eun Park, Ji Su Lee, Youngja Song, Gisun Baek, Seok Ho Yoo, Yeung-chul Kim, Dong Jung Lee, Bum-Chan Park, Young Woo Park
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Patent number: 10885261Abstract: Patterns in an integrated circuit may be evaluated, and a semiconductor device may be fabricated based on the evaluation. The evaluation may include a extracting and superimposing first patterns corresponding to design patterns of the same shape from input layout data generated based on inspecting the integrated circuit, generating distribution data of the first patterns based on the superimposed first patterns, determining an evaluation contour of the design patterns based on an evaluation condition and the distribution data, and generating output layout data based on replacing the first patterns with second patterns each having the evaluation contour. Weak points in the integrated circuit may be detected based on the output layout data. The fabricating may include selectively incorporating an integrated circuit into a semiconductor device based on a determination that the integrated circuit includes less than a threshold quantity and/or threshold concentration of weak points.Type: GrantFiled: October 31, 2019Date of Patent: January 5, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-won Kim, Jae-pil Shin, Tae-heon Kim, Yong-hyeon Kim, Tae-hyun Kim, Jin-kyu Park
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Publication number: 20200065453Abstract: Patterns in an integrated circuit may be evaluated, and a semiconductor device may be fabricated based on the evaluation. The evaluation may include a extracting and superimposing first patterns corresponding to design patterns of the same shape from input layout data generated based on inspecting the integrated circuit, generating distribution data of the first patterns based on the superimposed first patterns, determining an evaluation contour of the design patterns based on an evaluation condition and the distribution data, and generating output layout data based on replacing the first patterns with second patterns each having the evaluation contour. Weak points in the integrated circuit may be detected based on the output layout data. The fabricating may include selectively incorporating an integrated circuit into a semiconductor device based on a determination that the integrated circuit includes less than a threshold quantity and/or threshold concentration of weak points.Type: ApplicationFiled: October 31, 2019Publication date: February 27, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Jong-won KIM, Jae-pil Shin, Tae-heon Kim, Yong-hyeon Kim, Tae-hyun Kim, Jin-kyu Park
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Patent number: 10509885Abstract: Patterns in an integrated circuit may be evaluated, and a semiconductor device may be fabricated based on the evaluation. The evaluation may include a extracting and superimposing first patterns corresponding to design patterns of the same shape from input layout data generated based on inspecting the integrated circuit, generating distribution data of the first patterns based on the superimposed first patterns, determining an evaluation contour of the design patterns based on an evaluation condition and the distribution data, and generating output layout data based on replacing the first patterns with second patterns each having the evaluation contour. Weak points in the integrated circuit may be detected based on the output layout data. The fabricating may include selectively incorporating an integrated circuit into a semiconductor device based on a determination that the integrated circuit includes less than a threshold quantity and/or threshold concentration of weak points.Type: GrantFiled: September 27, 2017Date of Patent: December 17, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-won Kim, Jae-pil Shin, Tae-heon Kim, Yong-hyeon Kim, Tae-hyun Kim, Jin-kyu Park
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Publication number: 20180101637Abstract: Patterns in an integrated circuit may be evaluated, and a semiconductor device may be fabricated based on the evaluation. The evaluation may include a extracting and superimposing first patterns corresponding to design patterns of the same shape from input layout data generated based on inspecting the integrated circuit, generating distribution data of the first patterns based on the superimposed first patterns, determining an evaluation contour of the design patterns based on an evaluation condition and the distribution data, and generating output layout data based on replacing the first patterns with second patterns each having the evaluation contour. Weak points in the integrated circuit may be detected based on the output layout data. The fabricating may include selectively incorporating an integrated circuit into a semiconductor device based on a determination that the integrated circuit includes less than a threshold quantity and/or threshold concentration of weak points.Type: ApplicationFiled: September 27, 2017Publication date: April 12, 2018Applicant: Samsung Electronics Co., Ltd.Inventors: Jong-won KIM, Jae-pil SHIN, Tae-heon KIM, Yong-hyeon KIM, Tae-hyun KIM, Jin-kyu PARK
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Patent number: 9798849Abstract: A method of detecting stress of an integrated circuit including first and second patterns formed from different materials may comprise: determining one or more stress detection points of the first pattern; dividing a region including a first stress detection point of the one or more stress detection points into a plurality of divided regions; calculating areas of the second pattern at the divided regions; and/or detecting a stress level applied to the first stress detection point of the first pattern by the second pattern based on the areas of the second pattern at the divided regions.Type: GrantFiled: April 16, 2015Date of Patent: October 24, 2017Assignee: SAMSUNG EELECTRONICS CO., LTD.Inventors: Jae-Pil Shin, Chang-Woo Kang, Jong-Won Kim, Ho-Joon Lee, Kyu-Baik Chang, Won-Young Chung
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Publication number: 20160012174Abstract: A method of detecting stress of an integrated circuit including first and second patterns formed from different materials may comprise: determining one or more stress detection points of the first pattern; dividing a region including a first stress detection point of the one or more stress detection points into a plurality of divided regions; calculating areas of the second pattern at the divided regions; and/or detecting a stress level applied to the first stress detection point of the first pattern by the second pattern based on the areas of the second pattern at the divided regions.Type: ApplicationFiled: April 16, 2015Publication date: January 14, 2016Inventors: Jae-Pil SHIN, Chang-Woo KANG, Jong-Won KIM, Ho-Joon LEE, Kyu-Baik CHANG, Won-Young CHUNG
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Patent number: 9116438Abstract: A method of correcting flare includes measuring flare of a test pattern, calculating point spread functions (PSFs) of the flare as a function of distance, and correcting the flare using corresponding PSFs for an influence range of the flare. The influence range is divided into a first range less than a predetermined distance and a second range equal to or greater than the predetermined distance, and corresponding PSFs are separately applied to the first and second ranges to correct the flare.Type: GrantFiled: March 2, 2012Date of Patent: August 25, 2015Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Young-Mi Lee, In-Sung Kim, Ji-Soong Park, Byoung-Sup Ahn, Jae-Pil Shin
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Publication number: 20130311524Abstract: A file merging system includes first and second input disks, an output disk, and a processor connected to the first input disk, the second input disk and the output disk. The first input disk includes a first layout input file including a plurality of first cell records. The second input disk includes a second layout input file including a plurality of second cell records. The processor writes the plurality of first cell records and the plurality of second cell records in the output disk without modification.Type: ApplicationFiled: March 8, 2013Publication date: November 21, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Chang-Woo Kang, Jae-Pil Shin, Sang-Won Seo, Day-Hyun Jung
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Patent number: 8526707Abstract: In a method of inspecting a mask, an image of a pattern on the mask may be obtained. A histogram of the image by grey levels may be obtained. The histogram may be compared with information of the pattern to detect a defect of the mask. Thus, reliability of defect detection in the mask may be remarkably improved.Type: GrantFiled: December 15, 2010Date of Patent: September 3, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Yoonna Oh, Jae-Pil Shin, Jin Choi, Moon-Hyun Yoo, Jong-Bae Lee
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Publication number: 20120224156Abstract: A method of correcting flare includes measuring flare of a test pattern, calculating point spread functions (PSFs) of the flare as a function of distance, and correcting the flare using corresponding PSFs for an influence range of the flare. The influence range is divided into a first range less than a predetermined distance and a second range equal to or greater than the predetermined distance, and corresponding PSFs are separately applied to the first and second ranges to correct the flare.Type: ApplicationFiled: March 2, 2012Publication date: September 6, 2012Inventors: Young-Mi Lee, In-Sung Kim, Ji-Soong Park, Byoung-Sup Ahn, Jae-Pil Shin
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Patent number: 8234595Abstract: In a method of designing a mask layout, a wiring region for forming a metal wire is established, the wiring region having at least a standard width. Contact regions for forming contacts electrically connected to the metal wire are established in the wiring region. The contact regions adjacent to each other are grouped to divide the wiring region into a first region and a second region including the contact regions. First dummy regions are established in the first region, the first dummy regions corresponding to regions for forming first dummy patterns. Second dummy regions are established among the contact regions in the second region, the second dummy regions corresponding to regions for forming second dummy patterns.Type: GrantFiled: July 7, 2009Date of Patent: July 31, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Young-Ile Kim, Moon-Hyun Yoo, Jong-Bae Lee, Jae-Pil Shin
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Publication number: 20110142325Abstract: In a method of inspecting a mask, an image of a pattern on the mask may be obtained. A histogram of the image by grey levels may be obtained. The histogram may be compared with information of the pattern to detect a defect of the mask. Thus, reliability of defect detection in the mask may be remarkably improved.Type: ApplicationFiled: December 15, 2010Publication date: June 16, 2011Inventors: Yoonna OH, Jae-Pil Shin, Jin Choi, Moon-Hyun Yoo, Jong-Bae Lee
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Patent number: 7844940Abstract: A mask set with a light-transmitting region of a controlled size includes a plurality of masks for performing in-situ synthesis on probes of a microarray, wherein each mask includes a light-transmitting region and a light-blocking region, and the size of the light-transmitting region is equal to or greater than about 5% of the total size of the light-transmitting and light-blocking regions.Type: GrantFiled: February 13, 2008Date of Patent: November 30, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-pil Shin, Jin-sook Choi, Moon-hyun Yoo, Jong-bae Lee
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Publication number: 20100005441Abstract: In a method of designing a mask layout, a wiring region for forming a metal wire is established, the wiring region having at least a standard width. Contact regions for forming contacts electrically connected to the metal wire are established in the wiring region. The contact regions adjacent to each other are grouped to divide the wiring region into a first region and a second region including the contact regions. First dummy regions are established in the first region, the first dummy regions corresponding to regions for forming first dummy patterns. Second dummy regions are established among the contact regions in the second region, the second dummy regions corresponding to regions for forming second dummy patterns.Type: ApplicationFiled: July 7, 2009Publication date: January 7, 2010Inventors: Young-Ile Kim, Moon-Hyun Yoo, Jong-Bae Lee, Jae-Pil Shin
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Patent number: 7610574Abstract: Provided are a method and apparatus for designing a fine pattern that can be entirely transferred onto an object. The method includes reading the original data of a fine pattern for exposure. The fine pattern is divided into a first pattern not requiring revision and a second pattern requiring revision. The fine pattern is revised by forming an auxiliary pattern maintaining a first distance D1 from the second pattern. A fine pattern to be transferred onto a target object is estimated by running an emulation program including a first auxiliary pattern and a second auxiliary pattern. The estimated fine pattern is compared to the original data of the fine pattern for exposure, and the revised fine pattern is designated as a final fine pattern if there is no difference between the estimated fine pattern and the original data of the fine pattern for exposure.Type: GrantFiled: October 31, 2006Date of Patent: October 27, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-pil Shin, Young-ile Kim, Moon-hyun Yoo, Jong-bae Lee
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Patent number: 7536671Abstract: In a mask for forming a fine pattern to completely transfer a first and a second pattern from the mask onto a receiving object, and a method of forming the mask, the mask includes a first pattern, a second pattern, and a supplemental pattern. The first pattern repeats in a first direction. The second pattern is arranged between and parallel to the first pattern and has a first width W1. The supplemental pattern is disposed between the first pattern and the second pattern, and is spaced apart by a first distance D1 in the first direction from the second pattern.Type: GrantFiled: October 31, 2006Date of Patent: May 19, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-pil Shin, Young-Ile Kim, Moon-hyun Yoo
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Publication number: 20080193863Abstract: Provided are a mask set for in-situ synthesizing probes of a microarray, a method of fabricating the mask set, and a method of fabricating the microarray using the mask set. A mask set for a microarray includes a plurality of masks for in-situ synthesizing probes onto a substrate which includes an array of a plurality of probe cells, wherein each mask includes light-transmitting regions and light-blocking regions, each probe cell corresponds to a light-transmitting region or a light-blocking region, and a pattern of each light-transmitting region is corrected for an optical proximity effect.Type: ApplicationFiled: February 13, 2008Publication date: August 14, 2008Inventors: Jae-pil Shin, Jin-sook Choi, Jung-hwan Hah, Moon-hyun Yoo, Jong-bae Lee
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Publication number: 20080193864Abstract: A mask set with a light-transmitting region of a controlled size includes a plurality of masks for performing in-situ synthesis on probes of a microarray, wherein each mask includes a light-transmitting region and a light-blocking region, and the size of the light-transmitting region is equal to or greater than about 5% of the total size of the light-transmitting and light-blocking regions.Type: ApplicationFiled: February 13, 2008Publication date: August 14, 2008Inventors: Jae-pil Shin, Jin-sook Choi, Moon-hyun Yoo, Jong-bae Lee