Patents by Inventor Jagadeesan Jayachandran

Jagadeesan Jayachandran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Graphical specification of relative placement of circuit cells for repetitive circuit structures
    Patent number: 7761829
    Abstract: A graphical specification entry interface allows a circuit designer to define relative placement of repeating circuit component cells. The repetitive placement specifications are used to generate a repetitively structured circuit cell which may be subsequently installed into a physical circuit medium. The system simplifies user interaction in generating repetitive circuit structures such as semiconductor memory and, while affording heretofore unavailable topological diversity of such circuits.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: July 20, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Jagadeesan Jayachandran, Steve Song Lee