Patents by Inventor Jagrut Viliskumar Patel

Jagrut Viliskumar Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Adaptive memory calibration using bins
    Patent number: 8816742
    Abstract: An electronic device comprises an electronic component and an integrated circuit, wherein the integrated circuit is configured to generate a system clock and an external clock having a programmable delay from the system clock, provide the external clock to the electronic component, determine a delay range between system clock and the external clock in which the integrated circuit and the electronic component can communicate, and program the external clock with one of a plurality of predetermined delay values based on the delay range.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: August 26, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Jagrut Viliskumar Patel, Gregory Bullard, Sanat Kapoor
  • Identifying process and temperature of silicon chips
    Patent number: 7742887
    Abstract: Systems and techniques are disclosed relating to communications. The systems and techniques include determining the temperature and process speed of chips used in communications devices. The systems and techniques include measuring the output of ring oscillators embedded in the chips, and calculating the temperature and process speed therefrom.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: June 22, 2010
    Assignee: QUALCOMM Incorporated
    Inventors: Jagrut Viliskumar Patel, Martin Vyungchon Choe, Ziad Mansour
  • Dynamic clock frequency adjustment based on processor load
    Patent number: 7711966
    Abstract: In general, the disclosure is directed to techniques for reducing power consumption within computing devices, such as wireless communication devices. A device dynamically adjusts the CPU clock frequency based on CPU load in order to reduce power consumption. The device monitors the load of the CPU using a number of sample interrupts. The device determines whether to adjust the clock frequency based on the monitored load of the CPU. In general, the device increases the clock frequency when the load of the CPU is high and decreases the clock frequency when the load of the CPU is low.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: May 4, 2010
    Assignee: QUALCOMM Incorporated
    Inventors: Rajeev Prabhakaran, Jagrut Viliskumar Patel, Martin (Vyungchon) Choe, Kyle Parrington
  • Adaptive memory calibration using bins
    Publication number: 20080123444
    Abstract: An electronic device comprises an electronic component and an integrated circuit, wherein the integrated circuit is configured to generate a system clock and an external clock having a programmable delay from the system clock, provide the external clock to the electronic component, determine a delay range between system clock and the external clock in which the integrated circuit and the electronic component can communicate, and program the external clock with one of a plurality of predetermined delay values based on the delay range.
    Type: Application
    Filed: November 4, 2005
    Publication date: May 29, 2008
    Inventors: Jagrut Viliskumar Patel, Gregory Bullard, Sanat Kapoor