Patents by Inventor Jairo Velasco, Jr.

Jairo Velasco, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9449851
    Abstract: This disclosure provides systems, methods, and apparatus related to locally doping two-dimensional (2D) materials. In one aspect, an assembly including a substrate, a first insulator disposed on the substrate, a second insulator disposed on the first insulator, and a 2D material disposed on the second insulator is formed. A first voltage is applied between the 2D material and the substrate. With the first voltage applied between the 2D material and the substrate, a second voltage is applied between the 2D material and a probe positioned proximate the 2D material. The second voltage between the 2D material and the probe is removed. The first voltage between the 2D material and the substrate is removed. A portion of the 2D material proximate the probe when the second voltage was applied has a different electron density compared to a remainder of the 2D material.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: September 20, 2016
    Assignee: The Regents of the University of California
    Inventors: Dillon Wong, Jairo Velasco, Jr., Long Ju, Salman Kahn, Juwon Lee, Chad E. Germany, Alexander K. Zettl, Feng Wang, Michael F. Crommie
  • Publication number: 20160064249
    Abstract: This disclosure provides systems, methods, and apparatus related to locally doping two-dimensional (2D) materials. In one aspect, an assembly including a substrate, a first insulator disposed on the substrate, a second insulator disposed on the first insulator, and a 2D material disposed on the second insulator is formed. A first voltage is applied between the 2D material and the substrate. With the first voltage applied between the 2D material and the substrate, a second voltage is applied between the 2D material and a probe positioned proximate the 2D material. The second voltage between the 2D material and the probe is removed. The first voltage between the 2D material and the substrate is removed. A portion of the 2D material proximate the probe when the second voltage was applied has a different electron density compared to a remainder of the 2D material.
    Type: Application
    Filed: August 24, 2015
    Publication date: March 3, 2016
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Dillon Wong, Jairo Velasco, JR., Long Ju, Salman Kahn, Juwon Lee, Chad E. Germany, Alexander K. Zettl, Feng Wang, Michael F. Crommie
  • Patent number: 7948042
    Abstract: A multi-level lithography processes for the fabrication of suspended structures are presented. The process is based on the differential exposure and developing conditions of several a plurality of resist layers, without harsher processes, such as etching of sacrificial layers or the use of hardmasks. These manufacturing processes are readily suited for use with systems that are chemically and/or mechanically sensitive, such as graphene. Graphene p-n-p junctions with suspended top gates formed through these processes exhibit high mobility and control of local doping density and type. This fabrication technique may be further extended to fabricate other types of suspended structures, such as local current carrying wires for inducing local magnetic fields, a point contact for local injection of current, and moving parts in microelectromechanical devices.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: May 24, 2011
    Assignee: The Regents of the University of California
    Inventors: Chun Ning Lau, Gang Liu, Jairo Velasco, Jr.
  • Publication number: 20090225592
    Abstract: A multi-level lithography processes for the fabrication of suspended structures are presented. The process is based on the differential exposure and developing conditions of several a plurality of resist layers, without harsher processes, such as etching of sacrificial layers or the use of hardmasks. These manufacturing processes are readily suited for use with systems that are chemically and/or mechanically sensitive, such as graphene. Graphene p-n-p junctions with suspended top gates formed through these processes exhibit high mobility and control of local doping density and type. This fabrication technique may be further extended to fabricate other types of suspended structures, such as local current carrying wires for inducing local magnetic fields, a point contact for local injection of current, and moving parts in microelectromechanical devices.
    Type: Application
    Filed: March 3, 2009
    Publication date: September 10, 2009
    Applicant: The Regents of the University of California
    Inventors: Chun Ning Lau, Gang Liu, Jairo Velasco, JR.