Abstract: Described are methods and apparatus, including computer program products, for controlling time-sensitive data in a packet-based network. Data associated with a call is received, and the data includes an identifier associated with the data, a data source, or one or more data destinations. The data is associated with a logical trunk group selected from a plurality of logical trunk groups each in communication with the one or more data destinations over a packet-based network. The logical trunk group is selected based in part on the identifier. Calls through the packet-based network are managed based in part on the associated logical trunk group.

Abstract: A gateway apparatus includes multiple network server cards which are synchronized with each other to allow time slot switching of synchronous data across an asynchronous medium between source and destination server cards. The gateway includes synchronization logic and a data adaptation layer which implements a protocol for formatting of synchronous serial data. The data undergoes serial to parallel conversion and is formed into per time slot subpackets which are further packetized along with context and synchronization data. The packet is transmitted through an asynchronous switch after which the packet is disassembled into its constituent subpackets and queued into play-out buffers according to each subpackets' associated context and synchronization data. The apparatus allows synchronous data to be switched from a source time slot to a destination time slot across the asynchronous switch with a known, fixed delay.

Abstract: Described are methods and apparatus, including computer program products, for controlling time-sensitive data in a packet-based network. Data associated with a call is received, and the data includes an identifier associated with the data, a data source, or one or more data destinations. The data is associated with a logical trunk group selected from a plurality of logical trunk groups each in communication with the one or more data destinations over a packet-based network. The logical trunk group is selected based in part on the identifier. Calls through the packet-based network are managed based in part on the associated logical trunk group.

Abstract: Described are methods and apparatus, including computer program products, for hierarchically organizing logical trunk groups in a packet-based network. A first hierarchical group includes a first logical trunk group that is associated with a first trunk resource parameter. The first hierarchical group is associated with a group resource parameter, a portion of which is based on the trunk resource parameter. Data associated with a telephone call is associated with a logical trunk group. Transmission of the data through a packet-based network is based in part on the group resource parameter.

Abstract: Described are methods and apparatus, including computer program products, for defining logical trunk groups in a packet-based network. A plurality of logical trunk groups are defined for a first media gateway in communication with a packet-based network. Each of the plurality of logical trunk groups is associated with one or more media gateways in communication over the packet-based network with the first media gateway. Data associated with a call that is received or transmitted by the media gateway is associated with a first logical trunk group of the plurality of logical trunk groups.

Abstract: A gateway apparatus includes multiple network server cards which are synchronized with each other to allow time slot switching of synchronous data across an asynchronous medium between source and destination server cards. The gateway includes synchronization logic and a data adaptation layer which implements a protocol for formatting of synchronous serial data. The data undergoes serial to parallel conversion and is formed into per time slot subpackets which are further packetized along with context and synchronization data. The packet is transmitted through an asynchronous switch after which the packet is disassembled into its constituent subpackets and queued into play-out buffers according to each subpackets' associated context and synchronization data. The apparatus allows synchronous data to be switched from a source time slot to a destination time slot across the asynchronous switch with a known, fixed delay.

Abstract: A gateway apparatus includes multiple network server cards which are synchronized with each other to allow time slot switching of synchronous data across an asynchronous medium between source and destination server cards. The gateway includes synchronization logic and a data adaptation layer which implements a protocol for formatting of synchronous serial data. The data undergoes serial to parallel conversion and is formed into per time slot subpackets which are further packetized along with context and synchronization data. The packet is transmitted through an asynchronous switch after which the packet is disassembled into its constituent subpackets and queued into play-out buffers according to each subpackets' associated context and synchronization data. The apparatus allows synchronous data to be switched from a source time slot to a destination time slot across the asynchronous switch with a known, fixed delay.

Abstract: A method (300) and communication system (400, 500, 600, 1300, 1400) provide a remote procedure call from a client to a server via an unreliable communication channel using a plurality of retransmission timers. The method includes transmitting, by the client to the server, a request and waiting for a confirm message and retransmitting, by the client to the server, the request after each of a predetermined sequence of time-out periods implemented by the plurality of retransmission timers until a confirm message is received.

Abstract: A parallel CRC remainder coefficient generator (100) and method (1100) are described for providing efficient error detection in a digital data communication system. This method calculates a K-bit CRC remainder m data bits at a time, where m can be less than, equal to, or greater than K, and where the processing of each of the m bits requires a total of j, K-bit table look-ups into a total of j tables of 2.sup.b entries each, where m=jb. It also requires one m-bit exclusive-or operation, a total of (j-1) K-bit exclusive-or operations, and one (K-m)-bit exclusive-or operation if m<K. An implementation of a 16-bit CRC using the new method (700) in a 16-bit DSP processor with m=16, j=2 and b=8 reduces processor loading by 43% relative to the fastest prior art method which uses m=8, j=1, and b=8.

Abstract: A data compressor generates codewords representative of the location and length of a string match between an input data stream and a CAM array vocabulary table. A data decompressor looks up the codewords for a string match in its vocabulary table. The CAM array is arranged in a serpentine configuration to reduce track layout. A column priority encoder reverses the priority of alternate rows to maintain the logical flow through the CAM array. The CAM array uses a flipflop with a common control circuit to transfer data through the flipflop. When the data compressor is reset, the CAM array may locate matches in the unused portion which are interpreted as the reset character. A barrel shifter in the data compressor converts variable length codewords into fixed length for transmission. A barrel shifter in the data decompressor converts fixed length codewords back into variable length for decoding into the vocabulary table.

Abstract: A data compressor generates codewords representative of the location and length of a string match between an input data stream and a CAM array vocabulary table. A data decompressor looks up the codewords for a string match in its vocabulary table. The CAM array is arranged in a serpentine configuration to reduce track layout. A column priority encoder reverses the priority of alternate rows to maintain the logical flow through the CAM array. The CAM array uses a flipflop with a common control circuit to transfer and refresh data through the flipflop.

Abstract: A variable length string matcher uses absolute addressing of a history buffer; the longest matching string is determined by an associative content addressable memory.

Abstract: A data compressor generates codewords representative of the location and length of a string match between an input data stream and a CAM array vocabulary table. A data decompressor looks up the codewords for a string match in its vocabulary table. The CAM array is arranged in a serpentine configuration to reduce track layout. A column priority encoder reverses the priority of alternate rows to maintain the logical flow through the CAM array. The CAM array uses a flipflop with a common control circuit to transfer and refresh data through the flipflop.

Abstract: A data compressor generates codewords representative of the location and length of a string match between an input data stream and a CAM array vocabulary table. A data decompressor looks up the codewords for a string match in its vocabulary table. The CAM array is arranged in a serpentine configuration to reduce track layout. A column priority encoder reverses the priority of alternate rows to maintain the logical flow through the CAM array. The CAM array uses a flipflop with a common control circuit to transfer data through the flipflop. When the data compressor is reset, the CAM array may locate matches in the unused portion which are interpreted as the reset character. A barrel shifter in the data compressor converts variable length codewords into fixed length for transmission. A barrel shifter in the data decompressor converts fixed length codewords back into variable length for decoding into the vocabulary table.

Abstract: A variable length string matcher finds the longest string in a stored sequence of data elements (e.g., in a history buffer) that matches a string in a given sequence of data elements. The matcher includes circuitry that operates iteratively to compare data elements of the strings and determine the longest matching string based on when an iteration does not result in issuance of a match signal. In another aspect, the history buffer is an associative content addressable memory (CAM), and the string matcher uses absolute addressing of the CAM to determine the longest matching string.

Abstract: A method of and apparatus for allocating memory for storage of vocabularies used in adaptive data compression of a frame-multiplexed data stream of a data communications network. More specifically, a memory of a data compression encoder of the network is partitioned into a plurality of sections for the temporary storage of a corresponding plurality of data compression vocabularies. A memory section of the plurality is assigned to a current frame of the frame-multiplexed data stream based on information of the current frame for storage of a vocabulary created adaptively from the current frame.

Abstract: Information encoded by data compression (or another data encoding technique, e.g., encryption, requiring synchronization between the encoder and decoder) is transmitted over an unreliable network by checking for transmission errors after decoding. If an error is detected, the encoder is reset, using a reset protocol which may operate over an unreliable reverse channel by using a timer to generate further reset requests when the receiver does not acknowledge them in a timely fashion.