Patents by Inventor James A. Sutton, II

James A. Sutton, II has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10175994
    Abstract: A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: January 8, 2019
    Assignee: Intel Corporation
    Inventors: James A. Sutton, II, David W. Grawrock
  • Patent number: 10042649
    Abstract: A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: August 7, 2018
    Assignee: Intel Corporation
    Inventors: James A. Sutton, II, David W. Grawrock
  • Patent number: 9990208
    Abstract: A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: June 5, 2018
    Assignee: Intel Corporation
    Inventors: James A. Sutton, II, David W. Grawrock
  • Publication number: 20170147359
    Abstract: A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.
    Type: Application
    Filed: January 10, 2017
    Publication date: May 25, 2017
    Inventors: James A. Sutton, II, David W. Grawrock
  • Publication number: 20170132014
    Abstract: A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.
    Type: Application
    Filed: January 10, 2017
    Publication date: May 11, 2017
    Inventors: James A. Sutton, II, David W. Grawrock
  • Publication number: 20170115993
    Abstract: A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.
    Type: Application
    Filed: January 10, 2017
    Publication date: April 27, 2017
    Inventors: James A. Sutton, II, David W. Grawrock
  • Patent number: 9361121
    Abstract: A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: June 7, 2016
    Assignee: Intel Corporation
    Inventors: James A. Sutton, II, David W. Grawrock
  • Patent number: 9043594
    Abstract: A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 26, 2015
    Assignee: Intel Corporation
    Inventors: James A. Sutton, II, David W. Grawrock
  • Patent number: 8850098
    Abstract: A method and apparatus is described herein for supporting direct memory accesses between peer I/O devices. It is determined whether a guest physical address (GPA) referenced by an access generated from an I/O device, is within a range of GPAs associated with local I/O devices based at least in part on a GPA base and a GPA window size. If the GPA is within the window, then the GPA is translated to an HPA based at least in part on a base HPA associated with a local device and then forwarded to that local device. However, if the GPA is not within the window, then the access is forwarded upstream.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: September 30, 2014
    Assignee: Intel Corporation
    Inventors: Rajesh Madukkarumukumana, James A. Sutton, II, Ioannis Schoinas, Richard Uhlig
  • Publication number: 20140281467
    Abstract: A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.
    Type: Application
    Filed: March 24, 2014
    Publication date: September 18, 2014
    Inventors: James A. Sutton, II, David W. Grawrock
  • Patent number: 8706942
    Abstract: A method and apparatus is described herein for supporting direct memory accesses between peer I/O devices. It is determined whether a guest physical address (GPA) referenced by an access generated from an I/O device, is within a range of GPAs associated with local I/O devices based at least in part on a GPA base and a GPA window size. If the GPA is within the window, then the GPA is translated to an HPA based at least in part on a base HPA associated with a local device and then forwarded to that local device. However, if the GPA is not within the window, then the access is forwarded upstream.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: April 22, 2014
    Assignee: Intel Corporation
    Inventors: Rajesh Madukkarumukumana, James A. Sutton, II, Ioannis Schoinas, Richard Uhlig
  • Patent number: 8660266
    Abstract: Delivering a Direct Proof private key to a device installed in a client computer system in the field may be accomplished in a secure manner without requiring significant non-volatile storage in the device. A unique pseudo-random value is generated and stored in the device at manufacturing time. The pseudo-random value is used to generate a symmetric key for encrypting a data structure holding a Direct Proof private key and a private key digest associated with the device. The resulting encrypted data structure is stored on a protected on-line server accessible by the client computer system.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: February 25, 2014
    Assignee: Intel Corporation
    Inventors: James A. Sutton, II, Ernie F. Brickell, Clifford D. Hall, David W. Grawrock
  • Patent number: 8645688
    Abstract: A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: February 4, 2014
    Assignee: Intel Corporation
    Inventors: James A. Sutton, II, David W. Grawrock
  • Publication number: 20130205127
    Abstract: A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.
    Type: Application
    Filed: March 15, 2013
    Publication date: August 8, 2013
    Inventors: James A. Sutton, II, David W. Grawrock
  • Patent number: 8407476
    Abstract: An article of manufacture is provided for securing a region in a memory of a computer. According to one embodiment, the article of manufacture comprises a machine-accessible medium including data that, when accessed by a machine, causes the machine to: halt all but one of a plurality of processing elements in a computer, where the halted processing elements enter into a special halted state; load content into the region only after the halting of all but the one of the plurality of processing elements and the region is protected from access by the halted processing elements; place the non-halted processing element into a known privileged state; and cause the halted processing elements to exit the halted state after the non-halted processing element has been placed into the known privileged state.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: March 26, 2013
    Assignee: Intel Corporation
    Inventors: Michael A. Kozuch, James A. Sutton, II, David Grawrock
  • Patent number: 8386788
    Abstract: A method and apparatus is provided for securing a region in a memory of a computer. According to one embodiment, the method comprises halting of all but one of a plurality of processors in a computer. The halted processors entering into a special halted state. Content is loaded into the region only after the halting of all but the one of the plurality of processors and the region is protected from access by the halted processors. The method further comprises placing the non-halted processor into a known privileged state, and causing the halted processors to exit the halted state after the non-halted processor has been placed into the known privileged state.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: February 26, 2013
    Assignee: Intel Corporation
    Inventors: Michael A. Kozuch, James A. Sutton, II, David Grawrock
  • Publication number: 20120216025
    Abstract: A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.
    Type: Application
    Filed: April 11, 2012
    Publication date: August 23, 2012
    Inventors: James A. Sutton, II, David W. Grawrock
  • Patent number: 8185734
    Abstract: A method and apparatus for initiating secure operations in a microprocessor system is described. In one embodiment, one initiating logical processor initiates the process by halting the execution of the other logical processors, and then loading initialization and secure virtual machine monitor software into memory. The initiating processor then loads the initialization software into secure memory for authentication and execution. The initialization software then authenticates and registers the secure virtual machine monitor software prior to secure system operations.
    Type: Grant
    Filed: June 8, 2009
    Date of Patent: May 22, 2012
    Assignee: Intel Corporation
    Inventors: James A. Sutton, II, David W. Grawrock
  • Patent number: 8145816
    Abstract: A method and system of deadlock free bus protection of memory and I/O resources during secure execution. A bus cycle initiates entry of a bus agent into a secure execution mode. The chipset records an identifier of the secure mode processor. Thereafter, the chipset intercedes if another bus agent attempts a security sensitive bus cycle before the secure mode processor exits the secure mode.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: March 27, 2012
    Assignee: Intel Corporation
    Inventors: Stephen A. Fischer, Douglas Raymond Moran, James A. Sutton, II
  • Patent number: 7921293
    Abstract: An apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment are described. The method includes disregarding a received load secure region instruction when a currently active load secure region operation is detected. Otherwise, a memory protection element is directed, in response to the received load secure region instruction, to form a secure memory environment. Once directed, unauthorized read/write access to one or more protected memory regions are prohibited. Finally, a cryptographic hash value of the one or more protected memory regions is stored within a digest information repository as a secure software identification value. Once stored, outside agents may request access to a digitally signed software identification value to establish security verification of secure software within the secure memory environment.
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: April 5, 2011
    Assignee: Intel Corporation
    Inventors: Michael A. Kozuch, James A. Sutton, II, David Grawrock, Gilbert Neiger, Richard A. Uhlig, Bradley G. Burgess, David I. Poisner, Clifford D. Hall, Andy Glew, Lawrence O. Smith, III, Robert George