Patents by Inventor James Ball

James Ball has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11559765
    Abstract: Systems and methods for operating a water recovery system are described and include activating a condenser of the water recovery system. The method includes measuring a temperature associated with the condenser based on data obtained from a condenser temperature sensor. The method includes comparing the temperature associated with the condenser to a maximum threshold temperature. The method includes activating an auxiliary condenser of the water recovery system in response to the temperature associated with the condenser being greater than the maximum threshold temperature.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: January 24, 2023
    Assignee: SUNTOWATER TECHNOLOGIES, LLC
    Inventors: James Ball, Charles Becze
  • Patent number: 11545817
    Abstract: Load-bearing apparatus/systems for location in the vicinity of energized power lines are provided. The apparatus includes a base member. The base member has an upper layer and a backing surface layer. An uppermost surface of the upper layer is adapted to support on it at least power line workers and/or related stringing equipment. At least the uppermost surface of the upper layer is adapted to be electrically conductive. Methods for forming the apparatus are also provided.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: January 3, 2023
    Assignee: Quanta Associates, L.P.
    Inventors: David James Ball, Jody Milton Greer, David Karl Wabnegger, Robert Wayne Palmer
  • Patent number: 11527663
    Abstract: The invention provides an optoelectronic device comprising a photoactive region, which photoactive region comprises: an n-type region comprising at least one n-type layer; a p-type region comprising at least one p-type layer; and, disposed between the n-type region and the p-type region: a layer of a perovskite semiconductor without open porosity. The perovskite semiconductor is generally light-absorbing. In some embodiments, disposed between the n-type region and the p-type region is: (i) a first layer which comprises a scaffold material, which is typically porous, and a perovskite semiconductor, which is typically disposed in pores of the scaffold material; and (ii) a capping layer disposed on said first layer, which capping layer is said layer of a perovskite semiconductor without open porosity, wherein the perovskite semiconductor in the capping layer is in contact with the perovskite semiconductor in the first layer.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: December 13, 2022
    Assignee: OXFORD UNIVERSITY INNOVATION LIMITED
    Inventors: Henry James Snaith, Edward James William Crossland, Andrew Hey, James Ball, Michael Lee, Pablo Docampo
  • Publication number: 20220393048
    Abstract: The invention provides an optoelectronic device comprising a photoactive region, which photoactive region comprises: an n-type region comprising at least one n-type layer; a p-type region comprising at least one p-type layer; and, disposed between the n-type region and the p-type region: a layer of a perovskite semiconductor without open porosity. The perovskite semiconductor is generally light-absorbing. In some embodiments, disposed between the n-type region and the p-type region is: (i) a first layer which comprises a scaffold material, which is typically porous, and a perovskite semiconductor, which is typically disposed in pores of the scaffold material; and (ii) a capping layer disposed on said first layer, which capping layer is said layer of a perovskite semiconductor without open porosity, wherein the perovskite semiconductor in the capping layer is in contact with the perovskite semiconductor in the first layer.
    Type: Application
    Filed: August 8, 2022
    Publication date: December 8, 2022
    Inventors: HENRY JAMES SNAITH, EDWARD JAMES WILLIAM CROSSLAND, ANDREW HEY, JAMES BALL, MICHAEL LEE, PABLO DOCAMPO
  • Patent number: 11489527
    Abstract: A three dimensional circuit system includes first and second integrated circuit (IC) dies. The first IC die includes programmable logic circuits arranged in sectors and first programmable interconnection circuits having first router circuits. The second IC die includes non-programmable circuits arranged in regions and second programmable interconnection circuits having second router circuits. Each of the regions in the second IC die is vertically aligned with at least one of the sectors in the first IC die. Each of the second router circuits is coupled to one of the first router circuits through a vertical die-to-die connection. The first and second programmable interconnection circuits are programmable to route signals between the programmable logic circuits and the non-programmable circuits through the first and second router circuits. The circuit system may include additional IC dies. The first and second IC dies and any additional IC dies are coupled in a vertically stacked configuration.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: November 1, 2022
    Assignee: Intel Corporation
    Inventors: Scott Weber, Aravind Dasu, Ravi Gutala, Mahesh Iyer, Eriko Nurvitadhi, Archanna Srinivasan, Sean Atsatt, James Ball
  • Patent number: 11469338
    Abstract: The invention provides an optoelectronic device comprising a photoactive region, which photoactive region comprises: an n-type region comprising at least one n-type layer; a p-type region comprising at least one p-type layer; and, disposed between the n-type region and the p-type region: a layer of a perovskite semiconductor without open porosity. The perovskite semiconductor is generally light-absorbing. In some embodiments, disposed between the n-type region and the p-type region is: (i) a first layer which comprises a scaffold material, which is typically porous, and a perovskite semiconductor, which is typically disposed in pores of the scaffold material; and (ii) a capping layer disposed on said first layer, which capping layer is said layer of a perovskite semiconductor without open porosity, wherein the perovskite semiconductor in the capping layer is in contact with the perovskite semiconductor in the first layer.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: October 11, 2022
    Assignee: OXFORD UNIVERSITY INNOVATION LIMITED
    Inventors: Henry James Snaith, Edward James William Crossland, Andrew Hey, James Ball, Michael Lee, Pablo Docampo
  • Patent number: 11441178
    Abstract: A sensor apparatus includes a substrate, a semiconductor device disposed over the substrate, the semiconductor device having a surface electrode structure, and a saccharide coating formed over the surface electrode structure. The saccharide coating can be removed prior to use. The semiconductor device can further include a well and optionally a bead disposed in the well.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: September 13, 2022
    Assignee: Life Technologies Corporation
    Inventors: Phil Waggoner, James A. Ball, Wolfgang Hinz, Michael L. Minto, Scott Parker, David M. Cox, Alexander Mastroianni, Jeremy Gray, Marc Glazer, Kimberly Gorrell
  • Publication number: 20220280038
    Abstract: Systems and methods of assessing and treating eye disease. Such systems and methods can include presenting intraocular pressure (IOP) data as a circadian IOP profile on a polar plot over a 24-hr period to facilitate identification of cyclical variations of IOP occurring on a daily basis. Such methods can further include associating a particular circadian IOP profile with structural and/or a functional assessments, and utilizing such associations from multiple patients to facilitate identification of relationships to provide improved assessment and treatment of eye disease.
    Type: Application
    Filed: March 7, 2022
    Publication date: September 8, 2022
    Applicant: InjectSense, Inc.
    Inventors: Ariel Cao, James Ball, Sebnem Acar, Thomas H. Breunig
  • Patent number: 11424744
    Abstract: An integrated circuit device may include a programmable fabric die having programmable logic fabric and configuration memory that may configure the programmable logic fabric. The integrated circuit device may also include a base die that may provide fabric support circuitry, including memory and/or communication interfaces. The first die and the second die may be coupled using a multi-purpose interface that may allow communication between the first die and the second die. The multi-purpose interface may allow concurrent access to the base die by the programmable logic fabric and the configuration memory by using multiple channels over the multi-purpose interface.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: August 23, 2022
    Assignee: Intel Corporation
    Inventors: Kevin Clark, Scott J. Weber, James Ball, Ravi Prakash Gutala, Aravind Raghavendra Dasu
  • Publication number: 20220193576
    Abstract: A method of recovering a bead support from an emulsion includes supplying an aqueous surfactant solution into a centrifuge tube; supplying a hydrophobic liquid over the surfactant solution in the centrifuge tube, wherein a ratio of the volume of the aqueous surfactant solution to the volume of the hydrophobic liquid is not greater than 0.5; and applying an emulsion over the hydrophobic liquid while centrifuging, the emulsion comprising a dispersed aqueous phase including the bead support, the emulsion breaking and material of the dispersed phase preferentially partitioning to the surfactant solution.
    Type: Application
    Filed: December 30, 2021
    Publication date: June 23, 2022
    Inventors: Brian Reed, James A. Ball
  • Patent number: 11362517
    Abstract: Determining direct current (DC) leakage current flowing through an insulating structure in a high voltage DC power system wherein the DC leakage current is a composite DC current having one or more high magnitude momentary spikes, and having a DC component and an alternating current (AC) component, wherein the AC component has a first rate of change, and wherein the DC component has a second rate of change less than the first, having (a) providing a waveform separator which is configured to receive the composite DC current flowing through the insulating structure and to separate the composite DC current into the corresponding DC component and AC component, and (i) receive at least one corresponding digital signal and the DC component, ii) analyze the at least one corresponding digital signal and the DC component, (iii) determine a resultant leakage current flowing through the insulating structure, (b) electrically connecting the waveform separator to the insulating structure, (c) separating, in the waveform s
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: June 14, 2022
    Assignee: Quanta Associates, L.P.
    Inventors: Zoran Bilic, David James Ball
  • Patent number: 11342918
    Abstract: Techniques described herein may relate to providing a programmable interconnect network (e.g., a programmable network-on-chip (NOC)). A method may include determining a transmission parameter, bonding one or more channels of an interconnect network based at least in part on the transmission parameter, and power-gating any unused channels after the bonding.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: May 24, 2022
    Assignee: Intel Corporation
    Inventors: Sharath Raghava, Ankireddy Nalamalpu, Dheeraj Subbareddy, Harsha Gupta, James Ball, Kavitha Prasad, Sean R. Atsatt
  • Patent number: 11319587
    Abstract: The disclosure relates to novel particle compositions and methods of making said compositions having applications in nucleic acid analysis, as well as apparatuses and systems for the same.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: May 3, 2022
    Assignee: Life Technologies Corporation
    Inventors: Wolfgang Hinz, David Light, Todd Rearick, James A. Ball
  • Publication number: 20220113307
    Abstract: Aspects of the disclosure relate to compositions and methods for amplifying and/or detecting one or more target nucleic acid sequences (e.g., a nucleic acid sequence of one or more pathogens), and use of a trap region or reagent to reduce the level of one or more target nucleic acid analytes in an amplified sample prior to or in conjunction with detection. In some embodiments, the pathogens are viral, bacterial, fungal, parasitic, or protozoan pathogens, such as SARS-CoV-2 or an influenza virus. In some embodiments, the methods comprise isothermal amplification of a target nucleic acid and subsequent reduction in the level of one or more target nucleic acid analytes and detection of the amplification products.
    Type: Application
    Filed: October 8, 2021
    Publication date: April 14, 2022
    Applicant: Detect, Inc.
    Inventors: Amy Cornell, John H. Leamon, Jonathan M. Rothberg, Henry Kemble, James A. Ball
  • Publication number: 20220116044
    Abstract: Techniques described herein may relate to providing a programmable interconnect network (e.g., a programmable network-on-chip (NOC)). A method may include determining a transmission parameter, bonding one or more channels of an interconnect network based at least in part on the transmission parameter, and power-gating any unused channels after the bonding.
    Type: Application
    Filed: December 20, 2021
    Publication date: April 14, 2022
    Inventors: Sharath Raghava, Ankireddy Nalamalpu, Dheeraj Subbareddy, Harsha Gupta, James Ball, Kavitha Prasad, Sean R. Atsatt
  • Publication number: 20220057413
    Abstract: A buffered suspension includes a surfactant and a solid buffer particulate having a point of zero charge at least 1.2 pH units different that the pH of the buffered suspension. The buffered suspension can be prepared by mixing a stock solution with the solid buffer particulate and titrating. A method of preforming a pH sensitive process includes drawing the buffered suspension from a reservoir, filtering the solid buffer particulate from the buffered suspension, and applying the filtered solution to a sensor.
    Type: Application
    Filed: September 2, 2021
    Publication date: February 24, 2022
    Inventors: James A. BALL, Jonathan SCHULTZ
  • Patent number: 11229859
    Abstract: A method of recovering a bead support from an emulsion includes supplying an aqueous surfactant solution into a centrifuge tube; supplying a hydrophobic liquid over the surfactant solution in the centrifuge tube, wherein a ratio of the volume of the aqueous surfactant solution to the volume of the hydrophobic liquid is not greater than 0.5; and applying an emulsion over the hydrophobic liquid while centrifuging, the emulsion comprising a dispersed aqueous phase including the bead support, the emulsion breaking and material of the dispersed phase preferentially partitioning to the surfactant solution.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: January 25, 2022
    Assignee: Life Technologies Corporation
    Inventors: Brian Reed, James A. Ball
  • Patent number: 11223361
    Abstract: An integrated circuit device may include programmable logic fabric disposed on a first integrated circuit die and having configuration memory. The integrated circuit device may also include a base die that may provide memory and/or operating supporting circuitry. The first die and the second die may be coupled using a high-speed parallel interface. The interface may employ microbumps. The first die and the second die may also include controllers for the interface.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: January 11, 2022
    Assignee: INTEL CORPORATION
    Inventors: Kevin Clark, Scott J. Weber, James Ball, Simon Chong, Ravi Prakash Gutala, Aravind Raghavendra Dasu, Jun Pin Tan
  • Patent number: 11206024
    Abstract: Techniques described herein may relate to providing a programmable interconnect network (e.g., a programmable network-on-chip (NOC)). A method may include determining a transmission parameter, bonding one or more channels of an interconnect network based at least in part on the transmission parameter, and power-gating any unused channels after the bonding.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: December 21, 2021
    Assignee: Intel Corporation
    Inventors: Sharath Raghava, Ankireddy Nalamalpu, Dheeraj Subbareddy, Harsha Gupta, James Ball, Kavitha Prasad, Sean R. Atsatt
  • Publication number: 20210357491
    Abstract: According to examples, an apparatus may include a memory on which is stored machine-readable instructions that may cause a processor to receive a user credential from a terminal, in which the user credential is stored in a machine-readable code on a user device and the terminal obtained the machine-readable code from the user device. The processor may also identify at least one authentication factor associated with the user based on the user credential, in which the authentication factor(s) includes a physical location associated with the user and/or a time-based factor. The processor may further determine whether the authentication factor(s) indicates that the user is to be granted access to the terminal and based on a determination that the authentication factor(s) indicates that the user is to be granted access to the terminal, may grant the user access to the terminal.
    Type: Application
    Filed: May 12, 2020
    Publication date: November 18, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Rachel Anne Brown TELLER, Sarat Chandra SUBRAMANIAM, Steven James BALL