Patents by Inventor James Bertone

James Bertone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6128016
    Abstract: A graphical user interface provides a navigation model in the form of a hierarchical tree structure which is representative of a server system a user selected to manage. The hierarchical tree structure is populated or built to include a number of icons representative of different classes or categories of major components and their associated subcomponents contained in the selected server system and their logical relationships. In response to user icon selections, the navigation model expands and collapses the tree structure in a predetermined manner so as to enable the user to easily navigate through the different levels of components and subcomponents of the server with a minimum amount of information and determine status in addition to setting threshold values for items to be managed within the server system.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: October 3, 2000
    Assignee: NEC Corporation
    Inventors: Robert A. Coelho, James Bertone
  • Patent number: 5229999
    Abstract: In a data processing system, a data processing unit contains data processing logic including shadowed functional registers for storing the data being processed. The units also include fault monitoring logic, including, for each shadowed functional register, a shadowing copy register connected in parallel from the corresponding shadowed register to receive and store a copy of the data resident in the shadowed register. Test logic is connected from the shadowed and shadowing registers for comparing the data resident in the shadowed and shadowing registers and providing indications of possible faults in the data processing logic. The shadowed and shadowing registers are connected in a serial scan chain through a serial scan data path. The integrity of the fault monitoring logic is tested by serially shifting, or scanning, known test patterns of bits through the serial scan chain comprised of the shadowed registers and shadowing registers.
    Type: Grant
    Filed: October 5, 1990
    Date of Patent: July 20, 1993
    Assignee: Bull HN Information Systems Inc.
    Inventors: David Cushing, Edward Hutchings, Elmer W. Carroll, James Bertone