Abstract: A passive-intermodulation-mitigating mounting assembly for a fixture, such as can be affixed to a utility or communications monopole can include a first bracket and a second bracket respectively defining a first through hole and a second through hole. In some examples, a mounting plate supports an antenna or a radio. A fastener can extend through the first through hole and the second through hole, for instance to couple the first bracket with the second bracket to attach the mounting assembly to a fixture. The passive-intermodulation-mitigating mounting assembly can include a bushing that can be inserted into a through hole, and the bushing can physically and electrically isolate the fastener from one or more of the brackets. The isolation of the bushing helps inhibit the passive-intermodulation of the mounting assembly when the fastener extends, via the first bushing, through at least one of the through holes.

Abstract: A mounting assembly can include or use a pole attachment mount, first, second, and third arms, respectively including proximal ends that are respectively couplable to the pole attachment mount, the proximal end of the second arm located between the proximal ends of the first and third arms, a first face member, coupled to a distal end of the first arm and coupled to a distal end of the second arm and a second face member, coupled to a distal end of the third arm and coupled to a distal end of the second arm. Multiple mounting assemblies can he attached to a pole such as to provide a mounting surface for communications equipment and orienting the same such as to cover multiple azimuths around the pole.

Abstract: A passive-intermodulation-mitigating mounting assembly for a fixture, such as can be affixed to a utility or communications monopole can include a first bracket and a second bracket respectively defining a first through hole and a second through hole. In some examples, a mounting plate supports an antenna or a radio. A fastener can extend through the first through hole and the second through hole, for instance to couple the first bracket with the second bracket to attach the mounting assembly to a fixture. The passive-intermodulation-mitigating mounting assembly can include a bushing that can be inserted into a through hole, and the bushing can physically and electrically isolate the fastener from one or more of the brackets. The isolation of the bushing helps inhibit the passive-intermodulation of the mounting assembly when the fastener extends, via the first bushing, through at least one of the through holes.

Abstract: A passive-intermodulation-mitigating mounting assembly for a fixture, such as can be affixed to a utility or communications monopole can include a first bracket and a second bracket respectively defining a first through hole and a second through hole. In some examples, a mounting plate supports an antenna or a radio. A fastener can extend through the first through hole and the second through hole, for instance to couple the first bracket with the second bracket to attach the mounting assembly to a fixture. The passive-intermodulation-mitigating mounting assembly can include a bushing that can be inserted into a through hole, and the bushing can physically and electrically isolate the fastener from one or more of the brackets. The isolation of the bushing helps inhibit the passive-intermodulation of the mounting assembly when the fastener extends, via the first bushing, through at least one of the through holes.

Abstract: A passive-intermodulation-mitigating mounting assembly for a fixture, such as can be affixed to a utility or communications monopole can include a first bracket and a second bracket respectively defining a first through hole and a second through hole. In some examples, a mounting plate supports an antenna or a radio. A fastener can extend through the first through hole and the second through hole, for instance to couple the first bracket with the second bracket to attach the mounting assembly to a fixture. The passive-intermodulation-mitigating mounting assembly can include a bushing that can be inserted into a through hole, and the bushing can physically and electrically isolate the fastener from one or more of the brackets. The isolation of the bushing helps inhibit the passive-intermodulation of the mounting assembly when the fastener extends, via the first bushing, through at least one of the through holes.

Abstract: Systems, methods, and computer program products use combinations of international mobile equipment identity (IMEI), international mobile subscriber identity (IMSI), and account information to determine if a customer is eligible for service credit in near real-time. The customer needs an active account prior to inserting a subscriber identity module (SIM) into a device and powering on the device for the system to determine credit eligibility. No further customer action is required. The credit application process determines credit eligibility based upon device credit eligibility, account tenure, and/or credit rules, and applies the credit to the customer's account. The customer may be proactively notified when the credit is applied. The credit and tenure rules may be changed as the industry and business needs change to remain competitive in the industry. The SIM used is configured with software to lock the SIM to the device upon first power-on.

Abstract: Systems, methods, and computer program products use combinations of international mobile equipment identity (IMEI), international mobile subscriber identity (IMSI), and account information to determine if a customer is eligible for service credit in near real-time. The customer needs an active account prior to inserting a subscriber identity module (SIM) into a device and powering on the device for the system to determine credit eligibility. No further customer action is required. The credit application process determines credit eligibility based upon device credit eligibility, account tenure, and/or credit rules, and applies the credit to the customer's account. The customer may be proactively notified when the credit is applied. The credit and tenure rules may be changed as the industry and business needs change to remain competitive in the industry. The SIM used is configured with software to lock the SIM to the device upon first power-on.

Abstract: Disclosed is an air filtration mask formed from individual connectable components namely a base member, a filter holder member, a filter member, and an optional decorative mask cover member. The base member employs studs which allow the filter holding member to securely attach to the base member by means of holes in latches located around the rim of the filter holder member. A replaceable filter member attaches to the filter holder member snapping into the studs located on the inside of the filter holder. A fashion mask cover member can be attached to the front of the filter holder to enhance the appearance. A fashion scarf or bandana can be further attached to the base of the mask so that the mask assembly can stay completely hidden while worn.

Abstract: Systems, methods, and computer program products use combinations of international mobile equipment identity (IMEI), international mobile subscriber identity (IMSI), and account information to determine if a customer is eligible for service credit in near real-time. The customer needs an active account prior to inserting a subscriber identity module (SIM) into a device and powering on the device for the system to determine credit eligibility. No further customer action is required. The credit application process determines credit eligibility based upon device credit eligibility, account tenure, and/or credit rules, and applies the credit to the customer's account. The customer may be proactively notified when the credit is applied. The credit and tenure rules may be changed as the industry and business needs change to remain competitive in the industry. The SIM used is configured with software to lock the SIM to the device upon first power-on.

Abstract: Systems, methods, and computer program products use combinations of international mobile equipment identity (IMEI), international mobile subscriber identity (IMSI), and account information to determine if a customer is eligible for service credit in near real-time. The customer needs an active account prior to inserting a subscriber identity module (SIM) into a device and powering on the device for the system to determine credit eligibility. No further customer action is required. The credit application process determines credit eligibility based upon device credit eligibility, account tenure, and/or credit rules, and applies the credit to the customer's account. The customer may be proactively notified when the credit is applied. The credit and tenure rules may be changed as the industry and business needs change to remain competitive in the industry. The SIM used is configured with software to lock the SIM to the device upon first power-on.

Abstract: Systems, methods, and computer program products use combinations of international mobile equipment identity (IMEI), international mobile subscriber identity (IMSI), and account information to determine if a customer is eligible for service credit in near real-time. The customer needs an active account prior to inserting a subscriber identity module (SIM) into a device and powering on the device for the system to determine credit eligibility. No further customer action is required. The credit application process determines credit eligibility based upon device credit eligibility, account tenure, and/or credit rules, and applies the credit to the customer's account. The customer may be proactively notified when the credit is applied. The credit and tenure rules may be changed as the industry and business needs change to remain competitive in the industry. The SIM used is configured with software to lock the SIM to the device upon first power-on.

Abstract: Disclosed herein is a pharmacophore model for inhibiting Botulinum neurotoxin A metalloprotease activity which comprises a first plane A, a second plane B, a first hydrophobic moiety C, a second hydrophobic moiety D and a positive ionizable substituent E. The pharmacophore model may further comprise a heteroatom in the first plane A. In some embodiments, the distance between the center of the first plane A and the center of the second plane B is about 6.5 to about 9.5 ?. In some embodiments, the distance between the center of the first hydrophobic moiety C and the center of the second hydrophobic moiety D is about 8.0 to about 16.0 ?. In some embodiments, the distance between the center of the first plane to the center of the first hydrophobic moiety C is about 3.0 to about 5.0 ?. In some embodiments, the distance between the center of the second plane to the center of the second hydrophobic moiety C is about 3.0 to about 5.0 ?.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a n-type well region. The method further includes forming a gate corresponding to the semiconductor device on top of the n-type well region. The method further includes forming a source-drain extension region on each side of the gate in the n-type well region using a p-type dopant. The method further includes doping the source-drain extension region on each side of the gate in the n-type well region using a n-type dopant such that the n-type dopant is substantially encompassed within the source-drain extension region. The method further includes forming a source and a drain corresponding to the semiconductor device.

Abstract: An integrated circuit with a low voltage read/write operation is provided. The integrated circuit may include a processor and a plurality of memory cells organized in rows and columns and coupled to the processor, wherein a row of memory cells comprises a word line and all of the memory cells coupled to the word line, and wherein a column of memory cells comprises a bit line and all of the memory cells coupled to the bit line. The integrated circuit may further include a first power supply voltage terminal for receiving a first power supply voltage, wherein the first power supply voltage is provided to power the processor, and wherein the first power supply voltage is provided to power the plurality of memory cells during a first access operation of the plurality of memory cells.

Abstract: A method for adjusting an operating parameter of an integrated circuit having a memory and logic, where the logic includes a timing circuit, includes accessing the memory, determining a relative speed of the memory access with respect to a speed of the timing circuit, and selectively adjusting the operating parameter based on the relative speed. In one embodiment, an integrated circuit may include a ring oscillator, a shift register having a clock input coupled to an output of the ring oscillator, and compare logic coupled to an output of the shift register. The shift register is enabled in response to initiating a memory access to a memory and disabled in response to completing the memory access. The compare logic provides a relative speed indicator representative of a relative speed of the memory.

Abstract: An integrated circuit that has logic and a static random access memory (SRAM) array has improved performance by treating the interlayer dielectric (ILD) differently for the SRAM array than for the logic. The N channel logic and SRAM transistors have ILDs with non-compressive stress, the P channel logic transistor ILD has compressive stress, and the P channel SRAM transistor at least has less compressive stress than the P channel logic transistor, i.e., the P channel SRAM transistors may be compressive but less so than the P channel logic transistors, may be relaxed, or may be tensile. It is beneficial for the integrated circuit for the P channel SRAM transistors to have a lower mobility than the P channel logic transistors. The P channel SRAM transistors having lower mobility results in better write performance; either better write time or write margin at lower power supply voltage.

Abstract: A first gate of a multi-gate transistor within a pass gate can be provided with a bias voltage to alter the bias point of the multi-gate transistor. The bias point can be controlled differently during different phases of memory cell operation and the bias point can provide operational improvements during each phase of memory cell operation. In a specific configuration the multi-gate semiconductor device has a first current electrode connected to a first node of a bit cell, a second current electrode connected to a bit line, and a second gate electrode connected to a read/write line, wherein the control module can alter the bias point of the multi-gate semiconductor differently during different phases of memory cell operation. In one embodiment a FinFET can be connected in a parallel configuration with the multi-gate transistor.

Abstract: A device is disclosed having a first Field Effect Transistor having a channel region controlled by a gate, a second Field Effect Transistor having a first channel region substantially controlled by a first gate, and a second channel region substantially controlled by a second gate. The gate of the first Field Effect Transistor and the first gate of the second Field Effect Transistor are coupled to a memory write line. The second gate of the second Field Effect Transistor receives a control signal from a memory bit cell.

Abstract: An electronic device includes a memory cell that utilizes a bi-directional low impedance, low voltage drop full pass gate to connect a bit cell to a bit write line during a write phase, and during a read phase the full pass gate can remain off and a high input impedance read port can acquire and transmit the logic state stored by the memory cell to another subsystem. The full pass gate can be implemented by connecting a P type metal semiconductor field effect transistor (PMOS) in parallel with an NMOS device and driving the gates of the transistors with a differential signal. When a write operation requires a current to flow in a first direction, the PMOS device provides a negligible voltage drop, and when the write operation requires current to flow in a second or the opposite direction, the NMOS device can provide a negligible voltage.

Abstract: An electronic device can include a static-random-access memory cell. The static-random-access memory cell can include a first transistor of a first type and a second transistor of a second type. The first transistor can have a first channel length extending along a first line, and the second transistor can have a second channel length extending along a second line. The first line and the second line can intersect at an angle having a value other than any integer multiple of 22.5°. In a particular embodiment, the first transistor can include a pull-up transistor, and the second transistor can include a pass gate or pull-down transistor. A process can be used to form semiconductor fins and conductive members, which include gate electrode portions, to achieve the electronic device including the first and second transistors.