Abstract: Split-screen video displays are presented at a plurality of different sites for a video teleconference. Video cameras are focused respectively upon the conferees directly, and centrally. The displays at each site show the conferees at remote sites. The positioning of the conferees at different sites on a display is achieved electronically, as by delays of a half a line and/or delays of half a field, rather than by panning or tilting of a camera.

Abstract: Apparatus stores a composite video frame including synchronization signals, color burst signals, and analog signals. The synchronization signals, color burst signals and analog signals of a video frame are sampled and digitized by circuitry: Two addressable memories are provided. An input register coupled to first and second memories buffers a plurality of digitized samples. An output register coupled to said first and second memories buffers the outputs of the memories. Address circuits provide sequential addressed to the memories for each cycle. During a write cycle, control means provide control signals for enabling the input register to buffer the samples and alternately write enabling the memories to store said samples. During a read cycle, control signals are provided for alternately read enabling the second memories to output the samples and to enable the output register to buffer the output. A circuit converts the output into analog.

Abstract: A telecommunication system for synchronizing a digital bit stream sent from a central facility to a terminal on lines of television frames. Each active line starts with a horizontal sync pulse and a color burst. A first data clock at the central facility provides first data clock pulses synchronized with said color burst. A circuit at the central facility provides a flag bit one clock pulse wide delayed by a first constant number of clock pulses from the start of the line's horizontal sync pulse. A second data clock at the terminal provides second data clock pulses synchronized with said color burst. A circuit at said terminal provides a time window delayed by a second constant number of clock pulses from the start of the line's horizontal sync pulse so as to bracket said flag bit. A plurality of second data clock pulses occur during said time window.

Abstract: A TV channel selector assembly includes a keyboard having ten keys corresponding to the decimal numbers zero through nine, inclusive. The desired channel may be selected merely by activating the appropriately numbered keys, there being no other keys required to be activated to effect a channel change. After activation of the first key, which may be either a units digit channel or the tens digit of a two digit channel, a delay circuit defines a timed interval of about two seconds. Each keyboard output is encoded into a four digital word. A control device transfers the first digital word to a units channel input if a second key is not activated during the timed interval. If a second key is activated during the timed interval, the first digital word is transferred to a tens channel output, and the second digital word is transferred to the units channel output.