Patents by Inventor James D. Spain

James D. Spain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7821250
    Abstract: A clamp assembly for bringing an RF sensor into electrical contact with an RF current carrier is provided herein. The clamp assembly (101) comprises a first wedge-shaped element (103), and a second wedge-shaped element (105) which is slidingly engaged with said first wedge-shaped element. Preferably, the clamp assembly also comprises a collar (113) within which the first and second wedge-shaped elements are disposed. The clamp assembly preferably further comprises a fastener (111), such as a screw, which adjoins the first and second elements, in which case the clamp assembly is adapted such that, as the screw is rotated in a first direction, at least one of the first and second elements expands against the collar and/or the RF current carrier.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: October 26, 2010
    Assignee: Inficon, Inc.
    Inventors: Terry A. Turner, Rodney A. Herman, Duane T. Smith, James D. Spain
  • Patent number: 7728250
    Abstract: A clamp assembly for bringing an RF sensor into electrical contact with an RF current carrier is provided herein. The clamp assembly (101) comprises a first wedge-shaped element (103), and a second wedge-shaped element (105) which is slidingly engaged with said first wedge-shaped element. Preferably, the clamp assembly also comprises a collar (113) within which the first and second wedge-shaped elements are disposed. The clamp assembly preferably further comprises a fastener (111), such as a screw, which adjoins the first and second elements, in which case the clamp assembly is adapted such that, as the screw is rotated in a first direction, at least one of the first and second elements expands against the collar and/or the RF current carrier.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: June 1, 2010
    Assignee: Inficon, Inc.
    Inventors: Terry R. Turner, Rodney A. Herman, Duane T. Smith, James D. Spain
  • Publication number: 20080024158
    Abstract: A clamp assembly for bringing an RF sensor into electrical contact with an RF current carrier is provided herein. The clamp assembly (101) comprises a first wedge-shaped element (103), and a second wedge-shaped element (105) which is slidingly engaged with said first wedge-shaped element. Preferably, the clamp assembly also comprises a collar (113) within which the first and second wedge-shaped elements are disposed. The clamp assembly preferably further comprises a fastener (111), such as a screw, which adjoins the first and second elements, in which case the clamp assembly is adapted such that, as the screw is rotated in a first direction, at least one of the first and second elements expands against the collar and/or the RF current carrier.
    Type: Application
    Filed: July 31, 2006
    Publication date: January 31, 2008
    Inventors: Terry A. Turner, Rodney A. Herman, Duane T. Smith, James D. Spain
  • Patent number: 7118992
    Abstract: A method for manufacturing integrated circuits uses an atmospheric magnetic mirror plasma etching apparatus to thin a semiconductor wafer. In addition the process may, while thinning, both segregate and expose through-die vias for an integrated circuit chip. To segregate, the wafer may be partially diced. Then, the wafer may be tape laminated. Next, the backside of the wafer may be etched. As the backside material is removed, the partial dicing and through-die vias may be exposed. As such, the method reduced handling steps and increases yield. Furthermore, the method may be used in association with wafer level processing and flip chip with bump manufacturing.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: October 10, 2006
    Assignee: iFire Technologies, Inc.
    Inventors: Terry R. Turner, James D. Spain, Richard M. Banks
  • Patent number: 6794272
    Abstract: A method for manufacturing integrated circuits uses an atmospheric magnetic mirror plasma etching apparatus to thin a semiconductor wafer. In addition the process may, while thinning, both segregate and expose through-die vias for an integrated circuit chip. To segregate, the wafer may be partially diced. Then, the wafer may be tape laminated. Next, the backside of the wafer may be etched. As the backside material is removed, the partial dicing and through-die vias may be exposed. As such, the method reduced handling steps and increases yield. Furthermore, the method may be used in association with wafer level processing and flip chip with bump manufacturing.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: September 21, 2004
    Assignee: iFire Technologies, Inc.
    Inventors: Terry R. Turner, James D. Spain, Richard M. Banks
  • Publication number: 20030186513
    Abstract: A method for manufacturing integrated circuits uses an atmospheric magnetic mirror plasma etching apparatus to thin a semiconductor wafer. In addition the process may, while thinning, both segregate and expose through-die vias for an integrated circuit chip. To segregate, the wafer may be partially diced. Then, the wafer may be tape laminated. Next, the backside of the wafer may be etched. As the backside material is removed, the partial dicing and through-die vias may be exposed. As such, the method reduced handling steps and increases yield. Furthermore, the method may be used in association with wafer level processing and flip chip with bump manufacturing.
    Type: Application
    Filed: March 18, 2003
    Publication date: October 2, 2003
    Inventors: Terry R. Turner, James D. Spain, Richard M. Banks
  • Publication number: 20030082847
    Abstract: The invention is directed to a method for manufacturing integrated circuits. In one exemplary embodiment, the method uses an atmospheric plasma etching apparatus to thin a semiconductor wafer. In addition the process may, while thinning, both segregate and expose through-die vias for an integrated circuit chip. To segregate, the wafer may be partially diced. Then, the wafer may be tape laminated. Next, the backside of the wafer may be etched. As the backside material is removed, the partial dicing and through-die vias may be exposed. As such, the method reduced handling steps and increases yield. Furthermore, the method may be used in association with wafer level processing and flip chip with bump manufacturing.
    Type: Application
    Filed: April 26, 2002
    Publication date: May 1, 2003
    Applicant: i-Fire Technologies, Inc.
    Inventors: Terry R. Turner, James D. Spain, Richard M. Banks
  • Patent number: 5576629
    Abstract: A plasma monitoring and control method and system monitor and control plasma in an electronic device fabrication reactor by sensing the voltage of the radio frequency power that is directed into the plasma producing gas at the input to the plasma producing environment of the electronic device fabrication reactor. The method and system further senses the current and phase angle of the radio frequency power directed to the plasma producing gas at the input to the plasma producing environment. Full load impedance is measured and used in determining characteristics of the plasma environment, including not only discharge and sheath impedances, but also chuck and wafer impedances, primary ground path impedance, and a secondary ground path impedance associated with the plasma environment. This permits end point detection of both deposition and etch processes, as well as advanced process control for electronic device fabrication.
    Type: Grant
    Filed: October 24, 1994
    Date of Patent: November 19, 1996
    Assignee: Fourth State Technology, Inc.
    Inventors: Terry R. Turner, James D. Spain, John R. Swyers