Patents by Inventor James D. Wesselkamper
James D. Wesselkamper has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11582021Abstract: Disclosed approaches for validating initialization vectors determining by a configuration control circuit whether or not an input initialization vector is within a range of valid initialization vectors. In response to determining that the initialization vector is within the range of valid initialization vectors, the configuration control circuit decrypts the ciphertext into plaintext using the input initialization vector and configures a memory circuit with the plaintext. In response to determining that the first initialization vector is outside the range of valid initialization vectors, the configuration control circuit signals that the first initialization vector is invalid.Type: GrantFiled: November 20, 2019Date of Patent: February 14, 2023Assignee: XILINX, INC.Inventors: James D. Wesselkamper, Nathan A. Menhorn, Jason J. Moore
-
Patent number: 11379580Abstract: An array of non-volatile memory cells includes rows and columns. A volatile storage circuit provides addressable units of storage. A control circuit reads first type data and second type data from one or more of the rows and multiple ones of the columns of the array of non-volatile memory cells. The control circuit stores the first type data and second type data read from each row in one or more addressable units of storage of the volatile storage. A security circuit reads first data from the one or more of the addressable units of the volatile storage and selects from the first data, the second type data that includes one or more bits of each of the one or more of the addressable units. The security circuit performs an integrity check on the selected second type data, and generates an alert signal that indicates a security violation in response to failure of the integrity check.Type: GrantFiled: March 16, 2020Date of Patent: July 5, 2022Assignee: XILINX, INC.Inventors: James D. Wesselkamper, Edward S. Peterson, Jason J. Moore, Steven E. McNeil, Roger D. Flateau, Jr., Danny Tsung-Heng Wu, Boon Y. Ang
-
Patent number: 11280829Abstract: Disclosed approaches for controlling debug access to an integrated circuit (IC) device include receiving a debug packet by a debug interface circuit of the IC device. The debug interface circuit authenticates the debug packet in response to the debug packet having a command code that specifies enable debug mode or a command code that specifies disable debug mode. In response to the debug packet passing authentication and the command code specifying enable, the debug interface circuit enables debug mode of the IC device. In response to the debug packet passing authentication and the command code specifying disable, the debug interface circuit disables the debug mode of the IC device. In response to the debug packet failing authentication, the debug interface circuit rejects the debug packet.Type: GrantFiled: December 19, 2019Date of Patent: March 22, 2022Assignee: XLNX, INC.Inventors: Ramakrishna G. Poolla, Krishna C. Patakamuri, James D. Wesselkamper, Jason J. Moore, Edward S. Peterson, Steven E. McNeil
-
Patent number: 11216591Abstract: Apparatus and associated methods relate to authenticating a back-to-front-built configuration image. In an illustrative example, a circuit may include memory configured to store a signature S, a second hash H2, and a first data chunk C1. Signature S may be signed on a first hash H1. H1 may be the hash for H2 and C1. If signature S passes verification, a hash engine may perform hash functions on C1 and H2 to generate a hash H1?. H1? may be compared with H1 to indicate whether C1 has been tampered with or not. By using the incremental authentication, a signature that appears at the beginning of the image may be extended to the entire image while only using a small internal buffer. Advantageously, internal buffer may only need to store two hashes Hi, Hi+1, and a data chunk Ci, or, a signature S, a hash Hi, and a data chunk Ci.Type: GrantFiled: June 12, 2019Date of Patent: January 4, 2022Assignee: XILINX, INC.Inventors: Felix Burton, Krishna C. Patakamuri, James D. Wesselkamper
-
Patent number: 10978167Abstract: A disclosed circuit arrangement includes a bank of efuse cells, first and second sense amplifiers coupled to input signals representing constant logic-1 and logic-0 values, respectively, a storage circuit, an efuse control circuit, and an efuse security circuit. The efuse control circuit inputs signals from the bank of efuse cells and signals that are output from the first and second sense amplifiers, and stores data representative of values of the signals in the storage circuit. The efuse security reads the data from the storage circuit and generates an alert signal having a state that indicates a security violation in response to data representative of the value of the signal from the first sense amplifier indicating a logic-0 value or data representative of the value of the signal from the second sense amplifier indicating a logic-1 value.Type: GrantFiled: March 2, 2020Date of Patent: April 13, 2021Assignee: XILINX, INC.Inventors: James D. Wesselkamper, Edward S. Peterson, Jason J. Moore, Steven E. McNeil
-
Patent number: 10466275Abstract: Apparatus and associated methods relate to a glitch detection circuit monitoring a duration that a selected fractional supply voltage is below a predetermined voltage threshold. The selected fractional supply voltage may be at the predetermined threshold when the supply voltage is between a valid circuit-supply voltage and a power-on circuit-reset (POR). A glitch detect signal may be generated, for example, when the monitored duration is greater than a predetermined duration threshold. A test glitch generator may generate a test glitch, for example, having selectable voltage and duration, which may be selectably applied to the glitch detection circuit to verify operation.Type: GrantFiled: June 28, 2018Date of Patent: November 5, 2019Assignee: XILINX, INC.Inventors: Sandeep Vundavalli, Sree RKC Saraswatula, James D. Wesselkamper, Santosh Yachareni, Shidong Zhou, Anil Kumar Kandala
-
Patent number: 10288496Abstract: Methods and circuits are disclosed for measuring temperature and/or voltage using ring oscillators. In an example implementation, temperature and/or voltage are determined using an iterative measurements of a ring oscillator. The ring oscillator oscillates with a different voltage-temperature response in each of the first, second and third modes. In each iteration, a first set of indications of frequency are determined for a ring oscillator in a first mode, a second mode, and a third mode. A coarse temperature estimate and a coarse voltage estimate of the ring oscillator are determined based on the indications of frequency measured in a first iteration. A more accurate temperature estimate and a more accurate voltage estimate of the ring oscillator are determined as a function of a second set of indications of frequency measured in a second iteration, the coarse temperature estimate, and the coarse voltage estimate.Type: GrantFiled: August 15, 2016Date of Patent: May 14, 2019Assignee: XILINX, INC.Inventors: James D. Wesselkamper, Frank C. Wirtz, II, Giulio Corradi, Jason J. Moore
-
Patent number: 10044514Abstract: The disclosure describes approaches for protecting a circuit design for a programmable integrated circuit (IC). A black key is generated from an input red key by a registration circuit implemented on the programmable IC, and the black key is stored in a memory circuit external to the programmable IC. The programmable IC is configured to implement a pre-configuration circuit, which inputs the black key from the memory circuit and generates the red key from the black key. A ciphertext circuit design is decrypted into a plaintext circuit design by the programmable IC using the red key, and the red key is erased from the programmable IC. The programmable IC is reconfigured with the plaintext circuit design.Type: GrantFiled: September 25, 2015Date of Patent: August 7, 2018Assignee: XILINX, INC.Inventors: Edward S. Peterson, James D. Wesselkamper
-
Patent number: 10027492Abstract: A method of generating a physically unclonable function is described. The method comprises calculating a total variation associated with differences between a plurality of elements of an entropy source in an integrated circuit; calculating a global variation associated the plurality of elements of the entropy source; generating a local variation by removing the global variation associated with the plurality of elements from the total variation; and generating a unique signature based upon the generated local variation. A circuit for generating a physically unclonable function is also described.Type: GrantFiled: June 26, 2017Date of Patent: July 17, 2018Assignee: XILINX, INC.Inventor: James D. Wesselkamper
-
Patent number: 9530022Abstract: In one approach for protecting a design, a plurality of implementations of the design are generated. Each implementation includes an identification function. One of the implementations is selected as a current implementation, and the current implementation is installed on one or more electronic systems. For each electronic system, a method determines whether or not the current implementation is an authorized version on the electronic system from an output value of the identification function. If in the current implementation is not an authorized version on the electronic system, a signal is output indicating that the current implementation is not an authorized version on the electronic system. Periodically, another one of the implementations is selected as a new current implementation, and the new current installation is used for installations on one or more electronic systems.Type: GrantFiled: September 30, 2014Date of Patent: December 27, 2016Assignee: XILINX, INC.Inventors: Jason J. Moore, James B. Anderson, James D. Wesselkamper, Stephen M. Trimberger
-
Patent number: 9230112Abstract: A system generally relating to an SoC, which may be a field programmable SoC (“FPSoC”), is disclosed. In this SoC, dedicated hardware includes a processing unit, a first internal memory, a second internal memory, an authentication engine, and a decryption engine. A storage device is coupled to the SoC. The storage device has access to a boot image. The first internal memory has boot code stored therein. The boot code is for a secure boot of the SoC. The boot code is configured to cause the processing unit to control the secure boot.Type: GrantFiled: February 23, 2013Date of Patent: January 5, 2016Assignee: XILINX, INC.Inventors: Edward S. Peterson, Roger D. Flateau, Jr., James D. Wesselkamper, Steven E. McNeil, Jason J. Moore, Lester S. Sanders, Lawrence C. Hung, Yatharth K. Kochar
-
Patent number: 9218505Abstract: Approaches for configuring a programmable integrated circuit (IC) are disclosed. Encrypted configuration data is input to the programmable IC, and the encrypted configuration data is stored in configuration memory of the programmable IC. As the encrypted configuration data is input, a determination is made as to whether or not the encrypted configuration data is authentic. In response to the encrypted configuration data being authentic, the encrypted configuration data is read from the configuration memory and decrypted, and the decrypted configuration data is stored back in the configuration memory.Type: GrantFiled: January 31, 2013Date of Patent: December 22, 2015Assignee: XILINX, INC.Inventors: James D. Wesselkamper, James B. Anderson, Jason J. Moore, Edward S. Peterson